8-to-3 Priority Encoder
Maps the highest-priority asserted input among eight lines to a 3-bit binary index. The displayed circuit has no valid output, so I0 and no active input both appear as 000.
What You'll Learn
- Encode the highest-priority of 8 inputs into a 3-bit code.
- Read the 8-to-3 priority truth table — focusing on the priority masking.
- Explain why this three-output circuit cannot distinguish 'I0 active' from 'no input active' without an added valid signal.
- Recognize 8-to-3 priority encoders inside the Intel 8259 PIC and equivalent.
- Apply for interrupt control, leading-1 detection, and resource allocation.
How It Works
This circuit connects eight switches to one packaged 8-to-3 priority encoder and connects its three code outputs to three lamps. I7 has the highest priority and I0 the lowest. The output Y2Y1Y0 is the binary index of the highest-numbered active input.
If I7 is HIGH, the result is 111 regardless of I6–I0. Otherwise I6 produces 110, I5 produces 101, and the priority chain continues down to I0, which produces 000. With no active input, the component also produces 000. The displayed circuit has no separate valid output, so those last two conditions are intentionally indistinguishable at the three lamps. Add V = I7 + I6 + I5 + I4 + I3 + I2 + I1 + I0 when a downstream system must distinguish them.
Each encoded bit is asserted for a set of input indices, but a lower-priority contribution is admitted only if every higher-priority input is LOW. That masking rule makes the result deterministic when several switches are HIGH simultaneously.
Priority encoders are used inside interrupt selection, arbitration, leading-one detection, and resource-selection logic. Real controllers add masking, enable, validity, and acknowledgment circuitry around the encoder core.
Truth Table
Showing rows where each input is the highest active. Higher-priority inputs mask lower ones.
| Inputs | Output | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| I7 | I6 | I5 | I4 | I3 | I2 | I1 | I0 | Y2 | Y1 | Y0 | |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | No active input produces 000; no valid output is displayed. |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | I0 is the highest active input and also produces 000. |
| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | I1 highest → 001 |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | I2 highest → 010 |
| 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | I3 highest → 011 |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | I4 highest → 100 |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | I5 highest → 101 |
| 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | I6 highest → 110 |
| 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | I7 highest → 111 |
Boolean Expression
High bit: set if any of the upper four inputs is active.
Middle bit: set for a highest active index of 2, 3, 6, or 7; higher inputs mask the lower group.
Low bit: set for an odd highest active index, with each lower odd input admitted only when every higher input is inactive.
Try It Step-by-Step
Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.
- 1I0=1Expected:
Y2Y1Y0 = 000 (I0 selected)What you'll see:I0 is the lowest-priority input and produces code 000. The panel has no valid lamp, so this code alone does not prove that an input is active. - 2I0=1I3=1Expected:
Y2Y1Y0 = 011 (I3 selected)What you'll see:Both I0 and I3 high. I3 has higher priority → output 011 (= 3). I0 is masked. - 3I0=1I7=1Expected:
Y2Y1Y0 = 111 (I7 selected)What you'll see:I7 has the highest priority of all 8 inputs. Even with I0 active, the output is 111 (= 7). - 4Expected:
Y2Y1Y0 = 000 (no active input)What you'll see:With no active input, the three lamps also show 000. A downstream design needs a separately derived valid signal to distinguish this state from I0.
Components Used
Applications and Design Context
8-line interrupt controller. The 8259 PIC takes 8 IRQ lines, encodes the highest-priority active one, and presents it as the active vector for the CPU to fetch.
Floating-point leading-1 detection. After arithmetic, the leading-1 detection of an 8-bit field uses an 8-to-3 priority encoder (often extended to 24 or 53 bits for IEEE 754).
8-source bus arbitration. A bus controller with 8 requesters uses an 8-to-3 priority encoder to grant the bus to the highest-priority requester.
Priority-based resource allocation. For a fixed-width eight-entry free-list bitmap, a combinational priority encoder can select the lowest-numbered free slot in parallel instead of scanning entries sequentially. As the width grows, area and propagation delay still depend on the encoder topology and implementation.
Cache replacement policy. LRU bits across 8 cache ways feed a priority encoder to identify the least-recently-used way for eviction.
Frequently Asked Questions
Why is priority masking needed?
Because multiple inputs may go high simultaneously. Without masking, the encoder would output garbage. Priority masking ensures deterministic behavior: pick the highest-numbered (or lowest-numbered, depending on design) active input.
How is this used in the Intel 8259 PIC?
The 8259 has 8 IRQ inputs, an 8-to-3 priority encoder, plus mask registers and acknowledgment logic. When IRQs fire, the priority encoder picks the highest unmasked one and presents its vector to the CPU. In modern x86 systems, APIC architectures have largely superseded the 8259 for normal interrupt routing, but the priority-selection principle remains.
Why are larger priority encoders harder to build?
Wider priority encoders require more masking logic and therefore increase propagation delay. Practical implementations often encode small groups in parallel, select the highest active group, and concatenate the group index with its local encoded result.
What if I want lowest-priority instead?
Build a similar circuit but with the priority direction reversed: I0 has highest priority, I7 has lowest. Boolean expressions are mirrored. Some encoder ICs have a configuration pin that selects high-MSB-first vs high-LSB-first.
Can I cascade two 8-to-3 encoders to get 16-to-4?
Yes, but this displayed component has no valid output. Add an OR reduction for each 8-input group, use those group-valid signals to choose the higher-priority encoder, and concatenate the selected group bit with its 3-bit code.