4-to-1 MUX Channel Selector
A 2-bit select code routes one of four single-bit channel inputs to the output. The television framing is a data-selection metaphor; it does not model an audio or video signal path.
What You'll Learn
- Use S1 and S0 to select one of four data inputs.
- Distinguish select signals from the data signal being routed.
- Verify that unselected inputs do not affect the output.
- Relate the packaged MUX to its AND-OR sum-of-products expression.
- Scale the selection pattern to more channels and multi-bit data paths.
How It Works
This circuit contains four data switches, two select switches, one 4-to-1 multiplexer, and one output light. The canvas identifies the data inputs as channels 0 through 3. The select pair (S1, S0) addresses exactly one channel: - 00 → C0 - 01 → C1 - 10 → C2 - 11 → C3
The selected channel's current logic value appears at Y; the other three inputs have no effect on Y. Selection and data are therefore separate concepts. Changing an unselected channel must leave the output unchanged, while changing the selected channel must change the output accordingly.
At gate level, each channel is ANDed with the minterm for its select code. The four gated terms are then ORed. A packaged MUX hides that internal network behind six input pins—four data and two select—and one output pin.
The television-channel framing is an application metaphor for data routing. Real audio/video paths are multi-bit or analog and require a bank of suitable switching elements, but the control rule remains the same: one select code chooses one source.
Truth Table
Each select code is shown twice: once with the selected channel low and once with it high. The unselected channels are deliberately set to opposite values to verify isolation.
| Inputs | Output | ||||||
|---|---|---|---|---|---|---|---|
| S1 | S0 | C0 | C1 | C2 | C3 | Y | |
| 0 | 0 | 0 | 1 | 1 | 1 | 0 | S1S0 = 00 selects C0 = 0; high unselected inputs do not reach Y |
| 0 | 0 | 1 | 0 | 0 | 0 | 1 | S1S0 = 00 selects C0 = 1 |
| 0 | 1 | 1 | 0 | 1 | 1 | 0 | S1S0 = 01 selects C1 = 0 |
| 0 | 1 | 0 | 1 | 0 | 0 | 1 | S1S0 = 01 selects C1 = 1 |
| 1 | 0 | 1 | 1 | 0 | 1 | 0 | S1S0 = 10 selects C2 = 0 |
| 1 | 0 | 0 | 0 | 1 | 0 | 1 | S1S0 = 10 selects C2 = 1 |
| 1 | 1 | 1 | 1 | 1 | 0 | 0 | S1S0 = 11 selects C3 = 0 |
| 1 | 1 | 0 | 0 | 0 | 1 | 1 | S1S0 = 11 selects C3 = 1 |
Boolean Expression
The standard 4-to-1 MUX expression. Each data input is gated by the select-code minterm that addresses it, and the four terms are ORed together.
Try It Step-by-Step
Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.
- 1C0=1C1=0C2=0C3=0S0=0S1=0Expected:
Y = 1 (C0 selected)What you'll see:Select code 00 routes C0 to Y. Only C0 is high, so the output light turns on. - 2C0=0C1=1C2=0C3=0S0=1S1=0Expected:
Y = 1 (C1 selected)What you'll see:Select code 01 routes C1. Moving the high data value to C1 keeps Y high while the selected source changes. - 3C0=0C1=0C2=1C3=0S0=0S1=1Expected:
Y = 1 (C2 selected)What you'll see:Select code 10 routes C2. The output follows C2 and ignores the three low unselected channels. - 4C0=1C1=1C2=1C3=0S0=1S1=1Expected:
Y = 0 (C3 selected)What you'll see:Select code 11 routes C3, which is low. Y remains low even though C0, C1, and C2 are high, demonstrating input isolation.
Components Used
Applications and Design Context
Input-source selection. Audio, video, and measurement systems select one source for a downstream processing path. Wide signals use parallel MUX channels controlled by the same select code.
Processor datapaths. MUXes choose which register, immediate value, or functional-unit result feeds an ALU input or register write-back port.
Memory and peripheral routing. Address-decode logic controls MUXes that return data from one selected bank or peripheral.
KVM and instrumentation switching. Keyboard/video/mouse equipment and test systems route one of several sources to a shared destination, although physical interfaces may require specialized analog or high-speed switches.
FPGA logic. Lookup tables and routing fabrics contain many MUX structures that select configuration-dependent signal paths.
Frequently Asked Questions
Why is this circuit called a channel selector?
A multiplexer routes one of N data inputs to a single output. In this application, each input represents a channel, while S1 and S0 choose which channel is connected to Y.
How does this relate to a real television input selector?
Modern televisions perform substantially more processing than this one-bit model: they receive and decode RF, HDMI, or streamed media and then select among decoded signal paths. The relevant abstraction is still selection—control bits choose one source for the downstream pipeline.
How does the design scale to more channels or wider data?
An 8-to-1 MUX requires three select bits; a 16-to-1 MUX requires four. In general, selecting one of 2ⁿ inputs requires n select bits. Wider data words use one MUX per bit, with all MUXes sharing the same select lines.
Why can the output be low while other channel inputs are high?
The circuit does not generate channel data; it only routes it. If the selected input is 0, Y is 0 even when every unselected input is 1. This isolation is the central behavior to verify.
Does channel selection happen instantaneously in hardware?
A physical MUX has a finite propagation delay from either a data transition or a select transition to Y. The value depends on the logic family, fan-out, voltage, and implementation. This logic simulation emphasizes functional selection rather than a specific device's timing.