Full Adder with Carry
Full adder circuit using half adders and OR gate. Learn carry input handling and full arithmetic operations.
What You'll Learn
- Add three bits and produce a sum + carry-out.
- Read the full-adder truth table — 8 rows.
- Recognise sum as parity (XOR of all three) and carry-out as majority.
- See the full-adder's role as the building block of all wider adders.
- Apply for ripple-carry chains, counters, multipliers, and FP mantissa add.
How It Works
This circuit shows a single full-adder cell with all three inputs (A, B, Cin) wired to switches and both outputs (Sum, Cout) wired to lights. It's the elementary building block of all multi-bit integer arithmetic.
The sum bit is the parity of the three inputs (XOR-XOR-XOR): high if an odd number of inputs are 1. The carry-out is the majority function: high if at least 2 of the 3 inputs are 1.
Teaching the full-adder in isolation lets you focus on its 8-row truth table and verify the parity/majority pattern without distraction from carry chains. Once you grasp this single cell, multi-bit adders are just N copies wired in a chain — every bit position is identical.
Full-adders are also used as cells in carry-save adder arrays (multipliers), where their parity-and-majority properties combine partial-product columns efficiently before a final ripple stage.
Truth Table
Three inputs, two outputs. Sum is parity; Cout is majority of the three inputs.
| Inputs | Output | ||||
|---|---|---|---|---|---|
| A | B | Cin | Sum | Cout | |
| 0 | 0 | 0 | 0 | 0 | 0 + 0 + 0 = 0 |
| 0 | 0 | 1 | 1 | 0 | 0 + 0 + 1 = 1 |
| 0 | 1 | 0 | 1 | 0 | 0 + 1 + 0 = 1 |
| 0 | 1 | 1 | 0 | 1 | 0 + 1 + 1 = 2 (binary 10) |
| 1 | 0 | 0 | 1 | 0 | 1 + 0 + 0 = 1 |
| 1 | 0 | 1 | 0 | 1 | 1 + 0 + 1 = 2 |
| 1 | 1 | 0 | 0 | 1 | 1 + 1 + 0 = 2 |
| 1 | 1 | 1 | 1 | 1 | 1 + 1 + 1 = 3 (binary 11) |
Boolean Expression
Parity — high iff an odd number of inputs are 1.
3-input majority — high iff at least 2 of the 3 inputs are 1.
Try It Step-by-Step
Set the inputs in the embed above, then read what should happen and confirm.
- 1A = 1 B = 0 Cin = 0Expected:
S=1, Cout=0What you'll see: Single bit set — sum is 1. - 2A = 1 B = 1 Cin = 0Expected:
S=0, Cout=1What you'll see: Two bits set — sum is 2 (binary 10), so S=0 and Cout=1. - 3A = 0 B = 1 Cin = 1Expected:
S=0, Cout=1What you'll see: Different two bits set — same result. Order of which two bits doesn't matter. - 4A = 1 B = 1 Cin = 1Expected:
S=1, Cout=1What you'll see: All three bits set — sum is 3 (binary 11), so both outputs are 1.
Components Used
Real-World Applications
Every multi-bit adder in every CPU. A 64-bit adder is 64 full-adders chained — this exact cell, replicated.
Hardware multipliers. Wallace-tree and Dadda-tree multipliers use 2D arrays of full-adders to compress N×N partial products into a single sum.
Counters. Incrementing a counter by 1 is a full-adder chain with B = 0...01.
Floating-point mantissa add/subtract. After exponent alignment, the mantissa addition uses chained full-adders.
Multi-precision libraries. Software big-integer libraries chain hardware adds via the carry-out flag — full-adder semantics implemented at the ISA level.