Complementary Tri-State Buffers
Two tri-state buffers receive the same data bit and use complementary enables on one shared node. For either binary enable value, exactly one branch drives, so the visible output always equals the data input and never exposes an all-disabled state.
What You'll Learn
- Trace EN and ¬EN to two tri-state buffers with complementary enables.
- Explain why exactly one branch drives for each binary EN value.
- Distinguish an individual high-impedance pin from the resolved shared-node value.
- Verify that the only visible output simplifies to Y = A.
- Recognize the timing assumptions behind mutually exclusive hardware drivers.
How It Works
This circuit connects two tri-state buffer outputs to one shared node. Both buffers receive the same data switch A. The upper buffer is enabled directly by EN; a NOT gate drives the lower buffer with ¬EN. One output light observes the shared node.
- EN = 1 enables the upper branch and disables the lower branch. - EN = 0 disables the upper branch and enables the lower branch.
For either binary control value, exactly one branch drives and it always drives A. The externally visible function is therefore Y = A, independent of EN. A disabled buffer is internally high-impedance, but high-impedance is not a visible output of this complete circuit because the complementary branch remains active.
The topology demonstrates mutually exclusive bus drivers and the distinction between a component's pin state and the resolved state of a connected node. It does not demonstrate an all-drivers-disabled condition.
Truth Table
The table reports the one connected output light. EN chooses the active buffer branch, but both branches carry A, so Y equals A in all four steady-state binary cases.
| Inputs | Output | ||
|---|---|---|---|
| A | EN | Y | |
| 0 | 0 | 0 | EN = 0 selects the lower branch; it drives A = 0 |
| 1 | 0 | 1 | EN = 0 selects the lower branch; it drives A = 1 |
| 0 | 1 | 0 | EN = 1 selects the upper branch; it drives A = 0 |
| 1 | 1 | 1 | EN = 1 selects the upper branch; it drives A = 1 |
Boolean Expression
EN directly enables the upper buffer, while a NOT gate supplies the complementary enable to the lower buffer.
For either binary value of EN, exactly one buffer is enabled and that active buffer drives A onto the shared node.
Because both alternative drivers carry the same data signal, the only visible output simplifies to Y = A.
Try It Step-by-Step
Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.
- 1A=0EN=0Expected:
Y = 0; the lower buffer drives the shared nodeWhat you'll see:With EN low, the inverted enable activates the lower buffer and the light follows A = 0. - 2A=1EN=0Expected:
Y = 1; the lower buffer drives the shared nodeWhat you'll see:Changing A to 1 sets Y to 1 while the lower branch remains the active driver. - 3A=0EN=1Expected:
Y = 0; the upper buffer drives the shared nodeWhat you'll see:Setting EN high transfers drive responsibility to the upper branch; Y still follows A = 0. - 4A=1EN=1Expected:
Y = 1; the upper buffer drives the shared nodeWhat you'll see:With the upper branch active and A = 1, the shared output is high. All four cases confirm Y = A.
Components Used
Applications and Design Context
Shared internal buses. Mutually exclusive output enables allow one selected source to drive a common interconnect while the others release it.
Memory interfaces. Data pins may become active only for the selected device and operation, reducing dedicated wiring.
Bidirectional I/O structures. Output-enable logic controls when a pin drives and when it yields to an external source.
Clock-gated or power-partitioned paths. Alternative driver structures can isolate inactive sections, although physical designs require careful timing and electrical analysis.
Multiplexer equivalence. Synthesis tools often replace internal tri-state networks with multiplexers on technologies whose routing fabric does not support internal high-impedance nodes.
Frequently Asked Questions
Why does the output never show Z?
A disabled tri-state buffer releases its own output, but the other buffer is enabled by the complementary control and drives the same shared node. Therefore the connected output light never observes an undriven state for valid binary EN.
Can both buffers drive at the same time?
The upper enable is EN and the lower enable is ¬EN. For EN = 0 only the lower buffer drives; for EN = 1 only the upper buffer drives. Ideal binary logic therefore prevents both from driving simultaneously.
What effect does EN have on Y?
EN selects which physical branch drives the node, but both branches receive A. Selection changes the active driver, not the data value. If the branches carried different data inputs, the topology would behave like a 2-to-1 selection structure.
Why is there only one output column?
Only one output light is connected to the shared node. Individual buffer-output states are internal wiring conditions, not separately observable circuit outputs, so the truth table reports only Y.
What timing issue matters in hardware?
A real implementation must account for inverter and buffer delays. Around an EN transition, non-overlap or break-before-make control may be needed to avoid momentary contention. This logical simulator presents the steady-state binary function rather than analog timing hazards.