NOR Gate Universal Logic
NOR gate demonstration showing its universal property. Explore how NOR gates can create other logic functions. Complement to NAND universal logic.
What You'll Learn
- Read the NOR truth table — output 1 only when every input is 0.
- Recognise NOR as functionally complete (the dual of NAND).
- Build NOT, OR, AND from NOR gates alone.
- Compare NOR and NAND in CMOS — why NAND is usually faster.
- Connect NOR to the Apollo Guidance Computer's all-NOR architecture.
How It Works
NOR is OR followed by NOT: Y = ¬(A + B). Output is 1 only when every input is 0; any input being 1 drops the output to 0. The truth table is exactly inverted from OR — only the all-zeros row outputs 1.
Like NAND, NOR is functionally complete — every Boolean function can be built using only NOR gates: - NOT(A) = NOR(A, A) — both inputs the same, NOR becomes inverter. - OR(A, B) = NOT(NOR(A, B)) = NOR(NOR(A, B), NOR(A, B)). - AND(A, B) = NOR(NOT A, NOT B) = NOR(NOR(A, A), NOR(B, B)).
NOR's claim to fame outside textbooks: the Apollo Guidance Computer was built almost entirely from 3-input NOR gates — 5,600 of them, packaged 2 per chip. The decision to use only NOR was deliberate: simpler chip inventory, simpler reliability validation, and complete functional coverage from one cell type.
In CMOS, NOR is the dual of NAND: PMOS in series (between Vdd and output), NMOS in parallel (between output and ground). Because PMOS is intrinsically slower than NMOS, NOR is generally slower than NAND of the same fan-in — which is why most modern standard-cell libraries prefer NAND as their primary primitive.
This circuit demonstrates a 2-input NOR plus its self-loop NOT inverter, the building block for everything else.
Truth Table
NOR has 4 rows. Output is 1 only on the all-zeros row — the inverse of OR.
| Inputs | Output | ||
|---|---|---|---|
| A | B | Y | |
| 0 | 0 | 1 | Both 0 — NOR fires (the only NOR-high row) |
| 0 | 1 | 0 | |
| 1 | 0 | 0 | |
| 1 | 1 | 0 | Either input high → NOR drops to 0 |
Boolean Expression
NOR: NOT(OR(A, B)). Output low unless both inputs are 0.
Tying both NOR inputs together produces an inverter.
Inverting NOR recovers OR.
AND via De Morgan: invert both inputs, NOR them. Three NORs total (two as inverters, one for the NOR of inverses).
Try It Step-by-Step
Set the inputs in the embed above, then read what should happen and confirm.
- 1A = 0 B = 0Expected:
Y = 1What you'll see: Both off — NOR fires. The only combination of 4 that drives the output high. The opposite of OR. - 2A = 1 B = 0Expected:
Y = 0What you'll see: Single input high — NOR drops to 0. Any non-zero input is enough. - 3A = 0 B = 1Expected:
Y = 0What you'll see: Symmetric — NOR is commutative. Order doesn't matter. - 4A = 1 B = 1Expected:
Y = 0What you'll see: Both inputs high — NOR stays low. Once OR fires, NOR is committed to 0.
Components Used
Real-World Applications
Apollo Guidance Computer. Famously built from 3-input NORs only. Designed by MIT for NASA's Apollo program (1960s), it ran the lunar descent guidance code with 2 KB of magnetic-core memory and a clock around 1 MHz.
SR latch (active-high). Two cross-coupled NORs form an SR latch where set/reset inputs are active high — the dual of the NAND-based active-low SR latch. Both are foundational for sequential logic.
Reset distribution networks. Active-low reset signals often pass through NOR-based gating that combines power-on, watchdog, and manual reset sources.
Decoder circuits. Memory address decoders use wide NOR gates: each NOR detects the all-zeros pattern of one specific address (after bits are inverted as needed), enabling exactly one row select line.
Synthesis with NOR-rich libraries. Some FPGA architectures or custom processes are NOR-optimized. Synthesis flows for these targets minimize NOR depth instead of NAND depth.