4-to-2 Priority Encoder
Maps the highest-priority asserted input among four lines to a 2-bit binary index. The displayed circuit has no valid output, so I0 and no active input both appear as 00.
What You'll Learn
- Encode the highest-priority active input into a binary code.
- Distinguish a priority encoder from a plain encoder.
- Read the priority truth table — multiple inputs active resolves to the highest one.
- Write the priority Boolean expressions: each higher input masks lower ones.
- Apply priority encoders in interrupt controllers and bus arbitration.
How It Works
An encoder converts a one-hot input pattern into a binary code. A priority encoder also defines the result when more than one input is active: it returns the binary index of the highest-priority asserted input and ignores lower-priority assertions.
This circuit connects four switches directly to a packaged 4-to-2 priority encoder. I3 has the highest priority and I0 the lowest. Its two visible output lamps show Y1 and Y0: - I3 active: 11 (decimal 3), regardless of I2–I0. - Otherwise I2 active: 10 (decimal 2). - Otherwise I1 active: 01 (decimal 1). - Otherwise I0 active: 00 (decimal 0). - No input active: 00.
The circuit does not include a valid-output lamp. Consequently, the visible code 00 alone cannot distinguish I0 from the no-input condition. A larger design should add V = I3 + I2 + I1 + I0 when that distinction matters.
The encoded bits follow Y1 = I3 + I2 and Y0 = I3 + (¬I2 · I1). The second expression demonstrates priority masking: I2 suppresses I1's contribution to Y0, while I3 forces both output bits high.
Truth Table
The encoder reports the highest-numbered active input. Lower-priority entries are immaterial once a higher input is asserted; the two-output circuit has no separate valid signal.
| Inputs | Output | |||||
|---|---|---|---|---|---|---|
| I3 | I2 | I1 | I0 | Y1 | Y0 | |
| 0 | 0 | 0 | 0 | 0 | 0 | No input is active; the visible code is 00. |
| 0 | 0 | 0 | 1 | 0 | 0 | Only I0 is active; the visible code is also 00. |
| 0 | 0 | 1 | 0 | 0 | 1 | Only I1 — code 01 |
| 0 | 0 | 1 | 1 | 0 | 1 | I1 wins over I0 |
| 0 | 1 | 0 | 0 | 1 | 0 | Only I2 — code 10 |
| 0 | 1 | 1 | 1 | 1 | 0 | I2 wins over I1, I0 |
| 1 | 0 | 0 | 0 | 1 | 1 | Only I3 — code 11 |
| 1 | 1 | 1 | 1 | 1 | 1 | I3 wins over all — highest priority |
Boolean Expression
High bit of code: set if either of the upper two inputs is active.
Low bit: set if I3 is active, or if I1 is active while I2 is inactive.
Try It Step-by-Step
Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.
- 1I0=0I1=0I2=0I3=0Expected:
Y1Y0 = 00 (no active input)What you'll see:With no active input, both output lamps are LOW and the code reads 00. - 2I0=1I1=0I2=0I3=0Expected:
Y1Y0 = 00 (I0 selected)What you'll see:With only I0 active, the code still reads 00. Because this circuit has no valid output, the lamps alone cannot distinguish this state from no active input. - 3I0=1I1=1I2=1I3=0Expected:
Y1Y0 = 10 (I2 selected)What you'll see:I0, I1, and I2 all active. I2 has the highest priority so the encoder outputs 10 (= 2). I0 and I1 are ignored. - 4I0=1I1=1I2=1I3=1Expected:
Y1Y0 = 11 (I3 selected)What you'll see:All inputs active → I3 wins, output 11. Priority encoders always tell you about the highest-numbered active input.
Components Used
Applications and Design Context
Interrupt controllers. Multiple peripheral interrupts arrive simultaneously; a priority encoder picks the highest-priority one and presents its vector to the CPU. Crucial for pre-emptive scheduling.
Cache way replacement. When a cache evicts a line, a priority encoder selects which way to replace based on LRU bits or replacement policy.
Bus arbitration. Multiple bus masters request simultaneously; a priority encoder selects the highest-priority requester to grant the bus to.
Floating-point normalize. After arithmetic, the leading-1 detection of the mantissa uses a priority encoder to determine the shift count for normalization.
Resource allocation. Any "first available slot" search uses a priority encoder to find the lowest-numbered free resource quickly.
Frequently Asked Questions
Why use a priority encoder instead of a plain encoder?
A plain encoder assumes exactly one input is high (one-hot input). If two inputs are high simultaneously, a plain encoder produces an undefined (or arbitrary) output. Priority encoders deterministically pick the highest, even with multiple active inputs.
How can the circuit distinguish I0 from no active input?
This particular circuit exposes only Y1 and Y0, so code 00 is ambiguous: it can mean that I0 has priority or that no input is active. A consuming system can remove that ambiguity by adding V = I3 + I2 + I1 + I0 as a separate valid signal.
How does this differ from picking the LSB-first instead of MSB-first?
Some priority encoders output the lowest-priority active input (LSB-first). The choice depends on the application — interrupt controllers usually pick highest-priority; resource allocators often pick lowest-numbered. This circuit is MSB-first.
How does the encoder behave with glitches?
If an input bus glitches during transition, the encoded output may briefly show the wrong value. Critical systems either register the encoder output to a flip-flop or require inputs to be stable for one or more clocks before sampling.
Where is this used in CPU interrupt handling?
Multiple interrupt-request lines can feed priority-resolution logic. A priority encoder can provide the index of the highest-priority active request, and surrounding controller logic uses that result to select an interrupt vector or service routine. Latency depends on implementation, technology, loading, and arbitration; this behavioral template does not predict it.