3-Bit XOR Difference Mask
Three parallel XOR gates compare two 3-bit words and expose a bitwise mismatch mask on three lights. The circuit has no oscilloscope and does not reduce the mask to a single equality or any-difference output.
What You'll Learn
- Use XOR as a per-bit mismatch detector.
- Interpret D2D1D0 as a positional difference mask.
- Verify representative 3-bit comparisons against the displayed lamps.
- Distinguish a mismatch mask from a reduced ANY_DIFFERENT or ALL_EQUAL signal.
- Relate the mask's population count to Hamming distance without claiming that the circuit computes it.
- Explain why the three bit comparisons operate in parallel without a carry chain.
How It Works
This circuit compares two 3-bit words in parallel. The upper switches form the expected word E2E1E0, and the lower switches form the actual word A2A1A0. Each bit pair feeds one XOR gate, which computes D_i = E_i ⊕ A_i.
The three XOR outputs directly drive three lamps. Together they form the mismatch mask D2D1D0: a 0 means the corresponding bits match, while a 1 identifies a mismatch at that exact position. For example, expected 110 and actual 010 produce 100 because only the most significant bit differs.
The displayed circuit has no OR gate, equality output, or oscilloscope. It therefore does not collapse the mask into a single ANY_DIFFERENT signal and does not display ALL_EQUAL. Those functions can be added externally with an OR reduction and optional inversion.
Every output path contains one XOR gate, so the combinational depth from an input switch to its corresponding lamp is one gate delay, excluding interconnect delay. The three comparisons do not have a carry chain and settle independently.
Truth Table
Each row shows [E2,E1,E0,A2,A1,A0] and the resulting mismatch mask [D2,D1,D0]. These representative vectors exercise equality, single-bit differences, and complete inversion.
| Inputs | Output | ||||||||
|---|---|---|---|---|---|---|---|---|---|
| E2 | E1 | E0 | A2 | A1 | A0 | D2 | D1 | D0 | |
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 000 compared with 000; every bit matches. |
| 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 001 compared with 000; only bit 0 differs. |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 110 compared with 010; only bit 2 differs. |
| 1 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 101 compared with 010; all three bits differ. |
| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 111 compared with 110; only bit 0 differs. |
Boolean Expression
Each XOR gate compares one expected bit E_i with the corresponding actual bit A_i.
The three lamp outputs form a mismatch mask: a 1 marks each position at which the two words differ.
The Hamming distance is the arithmetic count of asserted mask bits. The displayed circuit does not contain the adder needed to produce that count.
Try It Step-by-Step
Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.
- 1A0=0A1=0A2=0E0=0E1=0E2=0Expected:
D2D1D0 = 000What you'll see:Set both words to 000. All three XOR outputs are LOW, so every difference lamp is off. - 2A0=0A1=0A2=0E0=1E1=0E2=0Expected:
D2D1D0 = 001What you'll see:Set E=001 and A=000. Only D0 becomes HIGH, marking the least significant mismatch. - 3A0=0A1=1A2=0E0=0E1=1E2=1Expected:
D2D1D0 = 100What you'll see:Set E=110 and A=010. Only D2 becomes HIGH, marking the most significant mismatch. - 4A0=0A1=1A2=0E0=1E1=0E2=1Expected:
D2D1D0 = 111What you'll see:Set E=101 and A=010. Every bit pair differs, so the mask is 111. - 5A0=0A1=1A2=1E0=1E1=1E2=1Expected:
D2D1D0 = 001What you'll see:Set E=111 and A=110. D0 is the only asserted output; the two upper positions match.
Components Used
Applications and Design Context
Diagnostic mismatch masks. Test and verification hardware can show exactly which bus bits disagree with an expected value.
Data-path comparison stages. Parallel XOR outputs are the first stage of equality, inequality, and error-localization circuits in processors and interfaces.
Memory and register testing. Comparing a written pattern with a value read back identifies failing bit positions rather than reporting only a pass/fail result.
Communication error analysis. A received word XORed with an expected word produces an error vector; its population count is the Hamming distance.
Sampled transition detection. Comparing current and registered previous values produces one change flag per channel, provided suitable storage and clocking are added.
Frequently Asked Questions
Why is XOR used for each bit position?
XOR is HIGH exactly when its two inputs differ, so one XOR gate directly produces one bit of the mismatch mask. All three comparisons operate independently and in parallel.
Does this circuit produce one overall different/equal result?
No. It exposes three separate mismatch outputs. To obtain ANY_DIFFERENT, add an OR reduction across D2, D1, and D0. To obtain ALL_EQUAL, invert that reduction or AND three XNOR results.
What information does the three-bit output provide?
The mask identifies which positions differ. Its number of asserted bits is the Hamming distance, but calculating that number requires addition or population-count logic that is not present in this schematic.
How does the mismatch mask scale to wider words?
Add one XOR gate and one output indication per additional bit. Because the comparisons are independent, the mask still has one XOR-gate level of logic. Any later reduction or population-count network adds its own depth.
Can this circuit determine which word is greater?
Magnitude comparison depends on the highest-order differing bit, not merely on whether bits differ. It requires a comparator, subtraction, or priority logic that evaluates bit significance.
How can the same XOR principle detect transitions?
Compare a live signal with a delayed, registered sample. The corresponding XOR output then indicates a change for the interval during which the samples differ. Storage and clocking are required; neither is part of this combinational template.