Fig. 1 — 8-to-1 MultiplexerInteractive simulation

What You'll Learn

  • Address 8 data inputs using a 3-bit select code.
  • Read the 8-to-1 MUX behavioural table — output follows the selected input.
  • Build an 8-to-1 MUX as a tree of 2-to-1 MUXes.
  • Use an 8-to-1 MUX as a 3-input LUT to realize any Boolean function of 3 variables.
  • Identify where wide MUXes appear: register files, audio switches, BIST.

How It Works

An 8-to-1 multiplexer routes one of eight data inputs (D0–D7) to a single output, based on a 3-bit select code (S2 S1 S0). Three select bits address 2³ = 8 inputs.

The select-to-data mapping is the binary value of S2S1S0: - 000 → D0, 001 → D1, 010 → D2, 011 → D3 - 100 → D4, 101 → D5, 110 → D6, 111 → D7

Boolean expression: Y is a sum of 8 minterms, each AND'ing one data input with the matching 3-bit select decode. SOP form: Y = ¬S2¬S1¬S0·D0 + ¬S2¬S1S0·D1 + ... + S2S1S0·D7.

An 8-to-1 MUX can be built as a tree of seven 2-to-1 MUXes (or two 4-to-1s feeding a 2-to-1 final stage). Either decomposition gives the same function.

The lookup-table view: the 8 data inputs hold the 8 output values of any 3-variable Boolean function; the 3 select bits are the function's input variables. This makes any 3-input combinational function expressible as an 8-to-1 MUX with appropriate hardcoded data inputs.

Truth Table

Select code S2S1S0 chooses which of D0–D7 reaches Y. The table holds D0–D7 at the alternating test vector 10101010 and sweeps every select code.

InputsOutput
S2S1S0D0D1D2D3D4D5D6D7Y
000101010101Select 0 routes D0=1.
001101010100Select 1 routes D1=0.
010101010101Select 2 routes D2=1.
011101010100Select 3 routes D3=0.
100101010101Select 4 routes D4=1.
101101010100Select 5 routes D5=0.
110101010101Select 6 routes D6=1.
111101010100Select 7 routes D7=0.

Boolean Expression

Y=∑i=07mi(S2,S1,S0)⋅DiY = \sum_{i=0}^{7} m_i(S_2,S_1,S_0) \cdot D_i

Where m_i is the i-th 3-variable minterm. Each term ANDs one D input with the unique select-code that addresses it.

Try It Step-by-Step

Set the listed controls in the embedded circuit, then compare the observed modeled state with the expected result.

  1. 1
    D0=1S0=0S1=0S2=0
    Expected:Y = 1
    What you'll see:Select 000 routes D0. The other Ds are ignored.
  2. 2
    D3=1S0=1S1=1S2=0
    Expected:Y = 1
    What you'll see:Select 011 = 3 → routes D3. Watch the binary count of select correspond to data input index.
  3. 3
    D7=1S0=1S1=1S2=1
    Expected:Y = 1
    What you'll see:Select 111 = 7 → routes D7. The MUX has covered all 8 data inputs across the 8 select codes.
  4. 4
    D1=0S0=1S1=0S2=0
    Expected:Y = 0
    What you'll see:Select=001 routes D1=0. Output is the value of the addressed input — a high select doesn't itself drive Y high.

Components Used

Applications and Design Context

Register file with 8 registers. Reading any of 8 registers uses an 8-to-1 MUX driven by a 3-bit register-address bus.

Audio source switching. A stereo amplifier switching between 8 input sources (CD, AUX1, AUX2, etc.) uses an 8-to-1 analog MUX with the source selector encoded as 3 bits.

Test multiplexer (BIST). Built-In Self-Test circuits use an 8-to-1 MUX to scan internal signals out for debug or test, with a 3-bit selector picking which signal to observe.

3-input Boolean function generator. Using an 8-to-1 MUX as a LUT lets you implement any 3-input function (256 possible) by hardcoding D0–D7.

Addressed memory-data selection. A 3-bit page or bank address can select one of eight data sources through an 8-to-1 MUX. The MUX selects data; a decoder instead asserts one of several word, bank, or control lines.

Frequently Asked Questions

Why does an 8-to-1 MUX need 3 select bits?

log₂(8) = 3. Three bits encode 8 distinct select codes — one per data input. In general N-to-1 MUXes need ⌈log₂N⌉ select bits.

Can I build a 16-to-1 MUX from two 8-to-1s?

Yes. Two 8-to-1 MUXes (one for inputs 0–7, one for inputs 8–15), each using the lower 3 select bits, feed a 2-to-1 MUX selected by the highest bit. Total: 2 × 8-to-1 + 1 × 2-to-1.

How does this compare to ROM lookup?

An 8-to-1 MUX with hardcoded data inputs IS a tiny ROM. A 3-input ROM has 8 addressable locations — the MUX with frozen Ds is logically the same. Real ROMs scale to thousands of words; an 8-to-1 MUX scales only to 8.

What determines the physical depth and delay of an 8-to-1 MUX?

A conceptual balanced tree contains three 2-to-1 selection levels. Other implementations use decoded selects or library-specific cells, so actual propagation delay and area depend on the technology, topology, fan-out, routing, voltage, and load; this behavioral component does not model them.

Is the data input width affected by the MUX size?

Standard MUXes route 1-bit signals. To MUX wider buses (e.g., 8 inputs of 16 bits each), use 16 parallel 8-to-1 MUXes — one per bit. The select lines are shared across all of them.

Continue Learning