XOR Gate
The two-input XOR gate outputs HIGH when its sampled inputs differ. It is the sum function of a half adder and a building block for parity and controlled inversion.
Overview
The two-input XOR gate outputs HIGH when its sampled inputs differ. It is the sum function of a Half Adder and is useful for parity and controlled inversion.
DigiSim Interface
| Direction | Pins | Behavior |
|---|---|---|
| Input | A, B | Two one-bit operands. |
| Output | Y | Driven exclusive-OR result. |
Truth Table
Y = A ⊕ B. A relevant driven unknown produces X; a released Z input follows Logic Lab's LOW
sampling convention. This packaged component has exactly two inputs.
Simulation Boundary
The gate does not expose an internal network or characterize IC technology, transistor count, voltage, current, fan-out, power, or device timing.
Learning Path
Next Steps
Frequently Asked Questions
What is an XOR gate?
XOR (exclusive OR) outputs 1 when inputs are different and 0 when they are the same. For 2 inputs: 0 XOR 0=0, 0 XOR 1=1, 1 XOR 0=1, 1 XOR 1=0.
Why is XOR important for adders?
XOR computes the sum bit in binary addition without the carry. Half adders use XOR for the sum and AND for the carry.
What is a parity checker?
XOR gates are chained to check parity: the output indicates whether an odd number of inputs are HIGH, useful for error detection in data transmission.