Single-Bit Tri-State Buffer Circuit Simulator

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Lo que aprenderás

Identify the three states of a tri-state buffer's output: 0, 1, and Z (high impedance).
Distinguish high-Z from logic 0 — Z is disconnected; 0 actively drives low.
Explain why tri-state buffers enable shared buses.
Read the tri-state truth table including the Z row when enable is low.
Recognise the schematic symbol: a buffer triangle with a perpendicular enable pin.

Cómo funciona

A tri-state buffer is a buffer with a third possible output state: Z (high impedance). When the enable input is asserted (EN = 1), it behaves exactly like a normal buffer — output follows input. When enable is deasserted (EN = 0), the output disconnects: it neither drives 0 nor 1, so any other driver on the wire takes over.

This circuit isolates that single behaviour into one component: one data input A, one enable input EN, one output Y. With two binary inputs there are four combinations, but only two distinct output behaviours: Y = A (when EN = 1) and Y = Z (when EN = 0).

The high-impedance state is what makes shared buses possible. Without tri-state, every wire would need its own dedicated driver — impractical for any system where many devices need to send data over the same lines. With tri-state, devices share a bus and arbitrate access via their enable lines.

In schematics, tri-state buffers look like a regular buffer (triangle) with an extra control pin entering perpendicular to the data path. In silicon, they're implemented as a buffer whose output transistors can both be turned off simultaneously, leaving the pin floating.

Tabla de verdad

Two inputs (A, EN), one output. EN = 1 means output follows A; EN = 0 means output is high-Z (disconnected).

Entradas		Salida
A	EN	Y
0	0	0	Disabled — Y floats to Z (often pulled to 0 by default)
1	0	0	Disabled — Y floats regardless of A
0	1	0	Enabled — Y = A
1	1	1	Enabled — Y = A

Expresión booleana

Y = \begin{cases} A & \text{if EN} = 1 \\ Z & \text{if EN} = 0 \end{cases}

Tri-state can't be expressed as a pure Boolean function — Z isn't a logic value. It requires a state-aware description.

Y = A \;\text{when EN}=1

Active behaviour: pass-through buffer when enabled.

Pruébalo paso a paso

Configura las entradas en la simulación de arriba, lee qué debería suceder y verifícalo.

1

A = 0 EN = 1

Esperado: Y = 0

Lo que verás: Buffer enabled, A is 0, output is 0. Acts as a regular buffer.
2

A = 1 EN = 1

Esperado: Y = 1

Lo que verás: Buffer enabled, A is 1, output is 1. Pass-through behaviour.
3

A = 1 EN = 0

Esperado: Y = Z (high-Z)

Lo que verás: Buffer disabled — output disconnects. Notice that the output light is dark, but in a real circuit some other driver could now take over the wire. The simulator usually shows Z as 0 (or a special pattern).
4

A = 0 EN = 0

Esperado: Y = Z (high-Z)

Lo que verás: Same disconnected state. The output is independent of A when EN = 0 — that's the whole point of tri-state.

Componentes utilizados

Aplicaciones en el mundo real

Memory data lines. Each RAM and ROM chip drives the data bus through tri-state buffers gated by chip-select. Only the selected chip drives; the others float, leaving the bus to it.

Register-file output multiplexing. Inside a CPU, all registers connect to a shared internal read bus through tri-state buffers. The instruction decoder enables exactly one register's tri-state at a time.

Bidirectional I/O pins. A single chip pin can be input or output by combining a tri-state output buffer with an input buffer. When the tri-state is disabled, the pin reads as input; when enabled, it drives.

Bus arbitration in multi-master systems. PCI, AMBA AHB, and similar protocols use tri-state to allow multiple bus masters to take turns driving the data lines.

Test and debug isolation. During chip test, internal signals are routed to test pins via tri-state buffers that disable normal operation and enable test mode.

Preguntas frecuentes

Is high-Z the same as 0?

No. High-Z means the output is **disconnected** — no current flows from it. Logic 0 means the output is **actively driving** to ground. The visible voltage may look similar in a simulator, but electrically they're very different.

What happens if I tie two tri-state outputs together with both enabled?

Bus contention: one drives high, the other drives low, and you get a near-short between supply rails. This stresses the transistors, generates heat, and can damage the chip. Real designs use careful enable arbitration to ensure only one driver is active at a time.

Why not just use a multiplexer instead of tri-state?

Multiplexers work and are common inside chips. But for buses crossing chip boundaries — say, a memory bus with N possible drivers — tri-state is much cheaper than wiring all N signals into an N-input mux at every reader. Tri-state lets you wire the data lines once and arbitrate via enables.

How does a tri-state buffer work in CMOS?

The output stage has both PMOS and NMOS transistors that can be turned **off simultaneously** when EN = 0 — the gate inputs are tied so neither path conducts. This leaves the output pin floating between the rails, no current flowing.

What does Z look like on an oscilloscope?

If nothing else drives the wire, Z appears as a slow drift toward the leakage equilibrium voltage (often ~Vdd/2). With a pull-up or pull-down resistor present, Z snaps to that resistor's anchor level. Z is not a stable digital value — it's the absence of one.