Full Adder with Carry
Full adder circuit using half adders and OR gate. Learn carry input handling and full arithmetic operations.
您将学到什么
- Add three bits and produce a sum + carry-out.
- Read the full-adder truth table — 8 rows.
- Recognise sum as parity (XOR of all three) and carry-out as majority.
- See the full-adder's role as the building block of all wider adders.
- Apply for ripple-carry chains, counters, multipliers, and FP mantissa add.
工作原理
This circuit shows a single full-adder cell with all three inputs (A, B, Cin) wired to switches and both outputs (Sum, Cout) wired to lights. It's the elementary building block of all multi-bit integer arithmetic.
The sum bit is the parity of the three inputs (XOR-XOR-XOR): high if an odd number of inputs are 1. The carry-out is the majority function: high if at least 2 of the 3 inputs are 1.
Teaching the full-adder in isolation lets you focus on its 8-row truth table and verify the parity/majority pattern without distraction from carry chains. Once you grasp this single cell, multi-bit adders are just N copies wired in a chain — every bit position is identical.
Full-adders are also used as cells in carry-save adder arrays (multipliers), where their parity-and-majority properties combine partial-product columns efficiently before a final ripple stage.
真值表
Three inputs, two outputs. Sum is parity; Cout is majority of the three inputs.
| 输入 | 输出 | ||||
|---|---|---|---|---|---|
| A | B | Cin | Sum | Cout | |
| 0 | 0 | 0 | 0 | 0 | 0 + 0 + 0 = 0 |
| 0 | 0 | 1 | 1 | 0 | 0 + 0 + 1 = 1 |
| 0 | 1 | 0 | 1 | 0 | 0 + 1 + 0 = 1 |
| 0 | 1 | 1 | 0 | 1 | 0 + 1 + 1 = 2 (binary 10) |
| 1 | 0 | 0 | 1 | 0 | 1 + 0 + 0 = 1 |
| 1 | 0 | 1 | 0 | 1 | 1 + 0 + 1 = 2 |
| 1 | 1 | 0 | 0 | 1 | 1 + 1 + 0 = 2 |
| 1 | 1 | 1 | 1 | 1 | 1 + 1 + 1 = 3 (binary 11) |
布尔表达式
Parity — high iff an odd number of inputs are 1.
3-input majority — high iff at least 2 of the 3 inputs are 1.
逐步尝试
在上方嵌入式电路中设置输入，然后阅读预期结果并验证。
- 1A = 1 B = 0 Cin = 0预期:
S=1, Cout=0您将看到: Single bit set — sum is 1. - 2A = 1 B = 1 Cin = 0预期:
S=0, Cout=1您将看到: Two bits set — sum is 2 (binary 10), so S=0 and Cout=1. - 3A = 0 B = 1 Cin = 1预期:
S=0, Cout=1您将看到: Different two bits set — same result. Order of which two bits doesn't matter. - 4A = 1 B = 1 Cin = 1预期:
S=1, Cout=1您将看到: All three bits set — sum is 3 (binary 11), so both outputs are 1.
使用的组件
实际应用
Every multi-bit adder in every CPU. A 64-bit adder is 64 full-adders chained — this exact cell, replicated.
Hardware multipliers. Wallace-tree and Dadda-tree multipliers use 2D arrays of full-adders to compress N×N partial products into a single sum.
Counters. Incrementing a counter by 1 is a full-adder chain with B = 0...01.
Floating-point mantissa add/subtract. After exponent alignment, the mantissa addition uses chained full-adders.
Multi-precision libraries. Software big-integer libraries chain hardware adds via the carry-out flag — full-adder semantics implemented at the ISA level.
常见问题
Why three inputs?
A and B are the operand bits; Cin is the carry-in from the previous bit position. With three inputs the cell can be used for any bit position in a multi-bit adder.
Is sum really just XOR?
Yes — XOR of all three inputs gives parity, which equals the LSB of the sum. The high bit of the sum (carry-out) needs separate logic — the majority function.
How is a full-adder built from gates?
Two half-adders + an OR. First HA adds A and B; second HA adds the result to Cin. Sum is the second HA's sum; Cout is the OR of both HAs' carries. Total: 2 XORs, 2 ANDs, 1 OR.
How many transistors in CMOS?
About 28 transistors in static CMOS — 12 for sum, 16 for carry. Optimised pass-transistor implementations can reach ~24 transistors. Custom layouts trade area for speed.
Why is sum called the parity function?
Parity is the count of 1s modulo 2. XOR over all inputs computes exactly this. So sum = parity makes physical sense: the LSB of an integer sum tracks whether the number of 1-bit additions was odd or even.