Modulo-N Counter with Reset Circuit Simulator

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启用 JavaScript 即可加载实时电路。下方真值表描述了该电路的行为。

您将学到什么

Build a counter that wraps at a custom value N rather than 2ⁿ.
Decode the terminal-count condition (count == N) with combinational logic.
Apply the decoded condition as an async or sync reset.
Distinguish async reset (brief glitch state) from sync reset (clean 9 → 0).
Implement BCD counters and use them in clocks and frequency synthesis.

工作原理

A modulo-N counter counts 0, 1, 2, ..., N−1, then resets back to 0 — wrapping at any custom value rather than the usual power-of-2. The classic example is a decade counter (mod-10) that counts 0–9 like a single decimal digit, used in BCD arithmetic and digit-by-digit displays.

Implementation: a regular binary counter combined with a reset-when-equal-to-N circuit. Compare the current count with N (a constant or programmable value); if equal, asynchronously reset the counter to 0 on the next clock edge. The counter then resumes from 0.

For a mod-10 counter: - Count 0–9 normally (4-bit binary counter sufficient). - When count reaches 1010 (= 10), assert reset asynchronously. - Counter immediately becomes 0 — but this is a brief 'glitch' state that's usually invisible because the reset is so fast.

A cleaner alternative: synchronous reset where count goes 9 → 0 directly, skipping the brief 10 state. This is the preferred form in production designs.

Mod-N counters are the basis of: - BCD (Binary-Coded Decimal) counters in clocks, scoreboards, multimeters. - Programmable frequency dividers (divide-by-N). - Time-base generators where N depends on the desired period.

逐步尝试

在上方嵌入式电路中设置输入，然后阅读预期结果并验证。

1

Clock = running, mod-10 mode

预期: Counter cycles 0..9 then wraps to 0

您将看到: After 9, the next clock edge takes the counter to 0 (skipping 10–15 entirely). The display reads decimal digits cleanly.
2

Clock = running, mod-6 mode

预期: Counter cycles 0..5 then wraps

您将看到: Set N=6 (e.g., for tens-of-seconds in a digital clock). The counter wraps after reaching 5.
3

Clock = stopped at 7

预期: Counter holds at 7

您将看到: Stop the clock — counter freezes wherever it is, regardless of the modulus.
4

Reset = 1

预期: Counter goes to 0

您将看到: Asserting external reset clears the counter immediately. Independent of the modulus logic.

使用的组件

实际应用

Digital clocks. Each digit (seconds, minutes, hours) is a mod-N counter: seconds=mod-60, minutes=mod-60, hours=mod-12 or mod-24. Each rolls over to drive the next digit's enable.

Frequency synthesis. A programmable mod-N counter divides the master clock by exactly N — used in PLLs and DDS chips for arbitrary frequency generation.

Sample-rate converters. Audio rate converters use mod-N counters to generate sample-tick signals at non-power-of-2 frequencies (e.g., 44.1 kHz from a 22.5792 MHz master).

Control sequencer. A sequencer with N states uses a mod-N counter to step through them; each state's outputs are decoded from the count value.

Digital metronome. A mod-N counter at 1 Hz × tempo produces a tick at exactly the right beat interval.

常见问题

What's the difference between a mod-10 counter and a regular 4-bit binary counter?

A 4-bit binary counter counts 0..15. A mod-10 counter counts 0..9 then wraps. The decode logic that detects count == 9 (or 10) and triggers reset is what makes a mod-10 different.

Why use BCD instead of binary for clocks?

Display compatibility. BCD digits map directly to 7-segment displays and decimal arithmetic. Pure binary requires a binary-to-BCD conversion before display, which is more logic. For applications already in decimal, BCD is more efficient.

How would I make a mod-12 counter for hours?

Decode count == 11 (binary 1011) with a 4-input AND. On the next clock edge, this AND signal triggers reset. Counter now cycles 0..11 then back to 0.

Async vs. sync reset — which is better?

Sync reset is cleaner — the counter goes directly from N-1 to 0 without entering an invalid state. Async reset is faster (no clock-edge delay) but creates a brief glitch where the count momentarily equals N before resetting. Production designs prefer sync.

Can I make N programmable instead of hardcoded?

Yes — use a comparator that takes the current count and a programmable threshold register as inputs. When count equals threshold, assert reset. The threshold register can be loaded by software or hardware to set N dynamically.