1-Bit Full Adder Circuit Simulator

交互式模拟器需要 JavaScript

启用 JavaScript 即可加载实时电路。下方真值表描述了该电路的行为。

您将学到什么

Add three bits (A, B, Cin) and produce sum + carry-out.
Read the full-adder truth table: 8 rows, sum = parity, carry-out = majority.
Recognise sum as XOR of all three inputs (parity function).
Recognise carry-out as the 3-input majority function.
Identify the full-adder as the universal cell for multi-bit arithmetic.

工作原理

A full adder adds three single bits — A, B, and a carry-in (Cin) — and produces a 2-bit result: a sum bit (S) and a carry-out bit (Cout). The carry-in lets full-adders chain together to form multi-bit adders, where each higher bit feeds the next via the carry chain.

- Sum: S = A ⊕ B ⊕ Cin (high if an odd number of inputs are 1) - Carry-out: Cout = (A · B) + (Cin · (A ⊕ B)) (high if at least two of the three inputs are 1)

The carry-out logic is the majority function: out of three inputs, the carry is 1 whenever at least two of them are 1. This makes intuitive sense — adding three bits gives a value 0, 1, 2, or 3, and the high bit (carry-out) is 1 only for results ≥ 2.

With three binary inputs there are 2³ = 8 possible input combinations. The truth table has 8 rows; sum follows the parity pattern; carry-out follows the majority pattern.

A full adder is the workhorse of binary arithmetic. Every wide adder, subtractor, multiplier, and divisor inside a CPU is built from chained full-adders.

真值表

Three inputs, two outputs. Sum is parity (XOR); Carry-out is majority (≥ 2 of 3 high).

输入			输出
A	B	Cin	Sum	Cout
0	0	0	0	0	0 + 0 + 0 = 0
0	0	1	1	0	0 + 0 + 1 = 1
0	1	0	1	0	0 + 1 + 0 = 1
0	1	1	0	1	0 + 1 + 1 = 2 (binary 10)
1	0	0	1	0	1 + 0 + 0 = 1
1	0	1	0	1	1 + 0 + 1 = 2
1	1	0	0	1	1 + 1 + 0 = 2
1	1	1	1	1	1 + 1 + 1 = 3 (binary 11)

布尔表达式

S = A \oplus B \oplus C_{in}

Sum bit — XOR of all three inputs (the parity function for 3 bits).

C_{out} = AB + C_{in}(A \oplus B)

Carry-out — fires if both A and B are 1, OR if Cin is 1 and at least one of A/B is 1.

C_{out} = AB + AC_{in} + BC_{in}

Equivalent: the 3-input majority function. Carry happens when any pair of inputs is 1.

逐步尝试

在上方嵌入式电路中设置输入，然后阅读预期结果并验证。

1

A = 0 B = 0 Cin = 0

预期: S=0, Cout=0

您将看到: All zero — no addition. Default state.
2

A = 1 B = 0 Cin = 0

预期: S=1, Cout=0

您将看到: Single bit set — sum is 1, no overflow.
3

A = 1 B = 1 Cin = 0

预期: S=0, Cout=1

您将看到: Two bits set — sum=2 (binary 10). Cout fires; sum bit is 0.
4

A = 1 B = 1 Cin = 1

预期: S=1, Cout=1

您将看到: All three bits set — sum=3 (binary 11). Both output bits high.

使用的组件

实际应用

CPU integer ALU. A 64-bit integer adder is 64 full-adders chained (with optional carry-lookahead acceleration). Every add, increment, decrement, and pointer arithmetic operation flows through this hardware.

Multipliers. Wallace-tree and Dadda-tree multipliers use arrays of full-adders to compress partial products into a final sum.

Floating-point arithmetic. The mantissa add/subtract path is a chain of full-adders after exponent alignment.

DSP MAC units. Multiply-accumulate (MAC) operations in DSP processors use a full-adder chain to accumulate products.

Counters. Incrementing a counter by 1 is essentially a full-adder chain with B fixed to 0...01 and Cin = 0.

常见问题

Why does a full adder have three inputs?

Two operand bits (A, B) plus the carry-in (Cin) from the previous bit position. The carry-in lets multi-bit additions propagate carries through the chain — bit 1's Cin is bit 0's Cout, etc.

Why is the sum just XOR of all three?

Sum is parity — high if an odd number of inputs are 1. Bits 0+0+0 = 0 (even), 0+0+1 = 1 (odd), 1+1+1 = 3 (odd). XOR over all inputs is exactly this parity calculation.

Why is the carry-out the majority function?

Adding three bits gives 0, 1, 2, or 3. The high bit (carry) is 1 only when the sum is ≥ 2 — i.e., when at least 2 of the 3 inputs are 1. That's the definition of majority.

Can a full adder be built from two half-adders?

Yes: the first half-adder adds A and B (gives sum1, carry1); the second half-adder adds sum1 and Cin (gives final S, carry2); the OR of carry1 and carry2 gives Cout. This decomposition matches the standard textbook diagram.

How many transistors is a full adder in CMOS?

About 28 transistors in static CMOS — 12 for sum (XOR-XOR), 16 for carry-out (majority). Optimized layouts using transmission gates can reach ~24 transistors. Carry-chain optimizations may share transistors across adjacent cells.