2-to-4 Decoder Circuit Simulator

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真理値表

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インタラクティブシミュレーターには JavaScript が必要です

JavaScript を有効にするとライブ回路が読み込まれます。下の真理値表で動作を確認できます。

Convert a 2-bit binary code into one of 4 one-hot output lines.
Read the 2-to-4 decoder truth table — exactly one output high per input code.
Write per-output Boolean expressions as ANDs of input minterms.
Recognise that decoders are universal address-selectors in memory.
Distinguish decoders (no data) from DEMUXes (with data input).

A decoder converts an N-bit input code into 2ᴺ output lines, exactly one of which is asserted high (one-hot). The 2-to-4 decoder takes a 2-bit input (A1, A0) and asserts one of four outputs (Y0–Y3) corresponding to the binary value of A1A0.

Mapping: - A1A0 = 00 → Y0 = 1, others = 0 - A1A0 = 01 → Y1 = 1, others = 0 - A1A0 = 10 → Y2 = 1, others = 0 - A1A0 = 11 → Y3 = 1, others = 0

Boolean: each output is a 2-input AND of the right combination of A1 and A0 (or their inverses). Y0 = ¬A1·¬A0, Y1 = ¬A1·A0, Y2 = A1·¬A0, Y3 = A1·A0.

Decoders are the heart of address-based selection — every memory chip, register file, and chip-select network uses one. A 16-bit address goes into a 16-to-65536 decoder to pick exactly one of 65,536 row lines in a memory array.

Many decoders include an enable input that gates all outputs to 0 when low — useful when one of several decoders should be active at a time.

Each 2-bit input code asserts exactly one of 4 outputs.

Y_0 = \overline{A_1}\overline{A_0},\;\; Y_1 = \overline{A_1}A_0

Outputs 0 and 1: AND of the input bits matched to the desired pattern.

Y_2 = A_1\overline{A_0},\;\; Y_3 = A_1 A_0

Outputs 2 and 3: AND of the high-half input pattern.

上の埋め込み回路で入力を設定し、期待される結果と一致するか確認しましょう。

1

A1 = 0 A0 = 0

期待値: Y0=1, others=0

観察ポイント: Code 00 → Y0 lights. The default state of any one-hot decoder.
2

A1 = 0 A0 = 1

期待値: Y1=1, others=0

観察ポイント: Code 01 → Y1. The active line walks across the outputs as the input increments.
3

A1 = 1 A0 = 0

期待値: Y2=1, others=0

観察ポイント: Code 10 → Y2. Notice exactly one output is always high.
4

A1 = 1 A0 = 1

期待値: Y3=1, others=0

観察ポイント: Code 11 → Y3. All four codes have been visited; each activates a unique output.

Memory row decoder. A RAM chip's address decoder asserts exactly one row select line based on the address bits — the same pattern, just much wider (e.g., 14-to-16384).

CPU instruction decoder. The opcode field of an instruction goes into a decoder that activates one of N micro-operation control lines.

Chip-select generation. A 2-bit address routes one of 4 chip-select lines from the CPU to peripheral chips.

Display segment decoders. BCD-to-7-segment converters use decoder logic to drive the right segments for each digit.

State machine output decoding. A binary-encoded state goes into a decoder to produce one-hot state-active signals for downstream logic.

Code 00 → Y0 active

Code 01 → Y1 active

Code 10 → Y2 active

Code 11 → Y3 active

Why is a decoder called "one-hot"?

Because exactly one output is hot (= 1) at a time, and all others are cold (= 0). One-hot encoding is widely used for state machines and address selection because it's easy to detect which output is active without further decoding.

What's the difference between a decoder and a DEMUX?

A decoder has no data input — it just asserts one of N output lines based on its input code. A DEMUX takes a data input D and routes it to one selected output. A DEMUX with D held high behaves like a decoder.

How does this scale to N-bit inputs?

An N-bit input gives 2ᴺ output lines. 2-bit → 4 outputs (this one); 3-bit → 8 outputs; 8-bit → 256 outputs; 16-bit → 65,536 outputs (a memory's row decoder). Each output is one minterm of the inputs.

Can a decoder have an enable?

Yes. An enable input AND-gates all outputs: when enable is 0, every output is 0 regardless of the input code. Useful for chip-select cascades — one master decoder enables a sub-decoder, which then asserts one of its outputs.

Is the decoder reversible (could I use it to encode)?

Not directly. An encoder is the inverse: given a one-hot input pattern, output the binary code of the active line. They're conceptually paired but built from different logic.