4-Bit ALU Circuit Simulator

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学べること

Perform arithmetic (add, subtract) and logical (AND, OR, XOR) operations on 4-bit operands.
Use an operation-select code to route the appropriate functional unit's output.
Generate status flags (zero, carry, overflow) as side outputs.
Recognize the ALU as the heart of every CPU.
Apply two's complement for subtraction using add-with-inverted-B.

仕組み

An Arithmetic Logic Unit (ALU) performs arithmetic and logical operations on multi-bit inputs. This 4-bit ALU takes two 4-bit operands (A, B) and an operation-select code, producing a 4-bit result and status flags (zero, carry, overflow).

Typical operation set for a small ALU: - Arithmetic: ADD (A + B), SUB (A − B via two's-complement add). - Logical: AND, OR, XOR (bitwise on each bit pair). - Other: NOT (invert A), shift left/right, sometimes increment.

The operation-select code is decoded by combinational logic that drives an internal MUX to choose which functional unit's output reaches the ALU output: - ADD/SUB use a 4-bit ripple-carry adder with the SUB control inverting B and setting Cin = 1 (two's complement). - Bitwise operations are pure combinational gate networks per bit. - A final MUX picks among them based on the op-select.

Status flags are generated as side outputs: - Zero (Z): OR-NOR-reduce of result bits — high when result is 0. - Carry (C): Carry-out of the adder. - Overflow (V): Detects signed-arithmetic overflow.

ALUs are at the heart of every CPU. Modern CPUs scale this 4-bit demo to 32 or 64 bits, with many more operations and aggressive optimization (carry-lookahead adders, dedicated multipliers, etc.).

順を追って試す

上の埋め込み回路で入力を設定し、期待される結果と一致するか確認しましょう。

1

A = 0011 B = 0010 Op = ADD

期待値: Result = 0101 (= 5), Z=0, C=0

観察ポイント: 3 + 2 = 5. Sum bit pattern visible. No overflow because result fits in 4 bits.
2

A = 0101 B = 0011 Op = SUB

期待値: Result = 0010 (= 2), Z=0, C=1

観察ポイント: 5 − 3 = 2. Internally A + ~B + 1; the carry-out C = 1 indicates no borrow.
3

A = 1100 B = 1010 Op = AND

期待値: Result = 1000

観察ポイント: Bitwise AND — only bits where both inputs are 1 stay high. 12 AND 10 = 8.
4

A = 0011 B = 1100 Op = OR

期待値: Result = 1111

観察ポイント: Bitwise OR — every bit is set in at least one input, so result is all 1s.
5

A = 1010 B = 1010 Op = XOR

期待値: Result = 0000, Z=1

観察ポイント: Bitwise XOR — equal inputs produce 0. Zero flag fires. Useful for equality testing.

使用コンポーネント

実世界での応用

Every CPU. Each integer ALU in a CPU implements addition, subtraction, AND, OR, XOR, NOT, shifts, and comparisons. The 4-bit demo scales to 32 or 64 bits in production.

Programmable controllers. PLCs use simple ALUs for setpoint comparisons, arithmetic on sensor data, and Boolean control logic.

DSP processors. DSPs include specialized ALUs for fixed-point arithmetic plus dedicated multiplier units for sum-of-products operations.

Educational architectures (MIPS, RISC-V). Teaching CPU design typically starts with a small ALU as the first component built and verified.

Hardware accelerators. Custom-designed accelerators (cryptography, signal processing) often have specialized ALUs tuned to their algorithm's specific operations.

よくある質問

How is subtraction implemented?

Two's complement: A − B = A + (~B) + 1. Internally, the SUB control signal inverts each bit of B (via XOR with 1) and sets the adder's Cin = 1 to add the +1. Same hardware as ADD, just with control bits flipped.

What does the carry flag mean?

For unsigned addition, carry-out indicates the result exceeded 4 bits. For unsigned subtraction (via two's complement), carry-out indicates no borrow occurred. CPUs use the carry flag for multi-precision arithmetic and for unsigned comparisons.

What does the overflow flag mean?

For signed (two's complement) arithmetic, overflow indicates the result exceeded the representable range (e.g., adding two large positives gave a negative). It's the XOR of carries into and out of the sign bit.

Why is the zero flag useful?

It's used by conditional branch instructions: "jump if equal" really tests "jump if (A − B) == 0" — i.e., the zero flag from the comparison ALU operation. CPUs use Z as the most-frequently-tested flag.

Why limit to 4 bits in the demo?

Educational tractability. A 4-bit ALU has 256 input combinations per operation — manageable to verify. A 32-bit ALU has 2^64 combinations — needs different verification techniques (formal methods, simulation with random vectors). The principles are identical at any width.