Components + Guidesesc

ALU (4-bit)

Use DigiSim's combinational 4-bit ALU for ADD, SUB, AND, OR, XOR, NOT A, SHL A, and logical SHR A. It drives R0–R3 plus Zero, Carry, Negative, and Overflow.

Overview

The 4-Bit Arithmetic Logic Unit is a fixed combinational datapath. It applies one of eight operations to two four-bit inputs and drives a four-bit result plus four status outputs.

DigiSim Interface

Direction Pins Behavior
Input A0–A3, B0–B3 Operands; bit 0 is least significant.
Input Op0–Op2 Operation code; Op0 is least significant.
Output R0–R3 Four-bit result.
Output Z, C, N, V Zero, Carry/borrow, Negative, and Overflow.

Operation Table

Z is HIGH when the complete result is zero; N copies result bit R3. NOT and both shifts ignore B. There is no clock, carry-in, or output-enable pin.

Released inputs sample as LOW. Driven unknowns are evaluated by binary completion, including operand relevance for the selected operation.

Simulation Boundary

The operation set and flag rules are fixed. The ALU does not store its result, expose internal arithmetic stages, or characterize a physical ALU's voltage, timing, area, or power.

Learning Path

Frequently Asked Questions

What is an ALU?

An ALU (Arithmetic Logic Unit) performs selected arithmetic and bitwise operations. A CPU may use one or more ALUs alongside specialized execution units.

How are DigiSim's 4-bit ALU operations selected?

Op2–Op0 codes 000–111 select ADD, SUB, AND, OR, XOR, NOT A, SHL A, and logical SHR A. NOT and both shifts use A; the component has no clock, output-enable, or carry-in pin.

What do the 4-bit ALU status outputs mean?

Zero reports an all-zero result and Negative copies result bit R3. Carry reports ADD carry-out, SUB borrow, or the bit shifted out; Overflow reports signed two's-complement overflow for ADD and SUB and is LOW for the other operations. AND, OR, XOR, and NOT clear Carry.