Half Adder
Use the combinational Half Adder to add one-bit inputs A and B. Sum is A XOR B, and Carry is A AND B; there is no carry-in input.
Overview
The Half Adder adds two one-bit unsigned operands. Sum is the XOR result and Carry is the AND result; the component has no carry-in input.
DigiSim Interface
| Direction | Pins | Behavior |
|---|---|---|
| Input | A, B | One-bit operands. |
| Output | S | Sum bit, A XOR B. |
| Output | C | Carry bit, A AND B. |
Truth Table
Released inputs sample as LOW. With a driven unknown, each output remains defined only when every
possible binary completion gives the same result; otherwise that output is driven X.
Simulation Boundary
The component is an atomic combinational model. It does not expose internal XOR/AND gates or model electrical carry timing.
Learning Path
Next Steps
Frequently Asked Questions
What is a half adder?
A half adder adds two single-bit inputs (A,B) producing a Sum (A XOR B) and a Carry (A AND B). It cannot handle carry input from a previous stage.
Why is it called a half adder?
It only handles half of the addition job: it cannot accept a carry input from a previous bit position, which is needed for multi-bit addition.