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Control Unit

Use DigiSim's fixed 8-bit CPU Control Unit to decode a low-nibble opcode and issue datapath controls across FETCH, DECODE, EXECUTE, and STORE states.

Overview

The Control Unit is DigiSim's fixed software model for sequencing the built-in 8-bit CPU datapath. It decodes the low-nibble opcode and drives the defined control outputs; it is not a user-programmable microcode store or a physical timing model.

Exact DigiSim.io Implementation

Direction Pin Role
Input CLK, RST Rising-edge clock; active-HIGH asynchronous reset.
Input OP0–OP3, Z_FLAG 4-bit opcode (OP0 is LSB) and Zero flag.
Output PC_INC, PC_LD, PC_OE Program-counter controls.
Output MEM_RD, MEM_WR, RAM_OE Memory controls.
Output IR_LD, IR_ADDR_OE Instruction-register controls.
Output ALU0–ALU2, ALU_OE ALU operation and output enable.
Output ACC_LD, ACC_OE, FLG_LD Accumulator and flags controls.
Output HALT, STATE0, STATE1 Halt and current state (00 FETCH, 01 DECODE, 10 EXECUTE, 11 STORE).

Logic and Timing

  • Each instruction advances on rising clock edges through FETCH → DECODE → EXECUTE → STORE, then returns to FETCH.
  • In each state, the software model looks up the outputs in a fixed built-in control-signal table.
  • RST immediately returns to FETCH and clears the halted state.
  • Instruction byte format is [operand:4][opcode:4]: the operand is the high nibble and the opcode is the low nibble. Operands and CPU addresses are therefore 0x0–0xF.
  • LDI is implemented; it is not a reserved opcode.

Learning Path

Prerequisites

Next Steps

Frequently Asked Questions

What does the Control Unit do?

The component reads CLK, RST, OP0–OP3, and Z_FLAG, then drives program-counter, memory, instruction-register, ALU, accumulator, flags, halt, and state signals for DigiSim's defined CPU model.

How does the DigiSim Control Unit sequence execution?

The software model advances through FETCH, DECODE, EXECUTE, and STORE on rising CLK edges and looks up a fixed built-in control-signal sequence for each opcode. This table is not a user-programmable control store; RST returns the unit to FETCH and clears the halted state.