Template: 1-Bit Half Adder
Template: Template: 1-Bit Half Adder - Fundamental 1-bit addition using XOR and AND gates with digit display. Learn basic binary arithmetic and carry generation.
배울 내용
- Compute the sum and carry of two single bits with XOR and AND.
- Read the half-adder truth table — 4 rows, just XOR and AND patterns.
- Identify why bit 0 of a ripple adder uses a half-adder, not a full-adder.
- Understand the difference between half-adder and full-adder (no carry-in).
- Recognize that sum + carry encode 0–2 in 2-bit binary.
작동 원리
A half adder adds two single bits. It takes two inputs (A, B) and produces two outputs: - Sum = A ⊕ B (XOR — high when exactly one input is high) - Carry = A · B (AND — high only when both inputs are high)
This directly implements the four cases of single-bit binary addition: - 0 + 0 = 00 (sum 0, carry 0) - 0 + 1 = 01 (sum 1, carry 0) - 1 + 0 = 01 (sum 1, carry 0) - 1 + 1 = 10 (sum 0, carry 1) — the carry signals overflow into the next column
Why is it called "half"? Because it can't accept a carry-in from a previous bit position. To chain half-adders for multi-bit addition, you'd lose the carry-in capability — that's why higher bits use full adders (XOR/AND with three-input handling). The half-adder is only sufficient for the lowest bit position where there's nothing to carry from below.
The two outputs (sum, carry) together encode the integer 0, 1, or 2 in 2-bit binary — exactly the range needed for adding two single-bit operands.
진리표
Half adder: add two bits, produce 2-bit result (sum, carry).
| 입력 | 출력 | |||
|---|---|---|---|---|
| A | B | Sum | Carry | |
| 0 | 0 | 0 | 0 | 0 + 0 = 0 |
| 0 | 1 | 1 | 0 | 0 + 1 = 1 |
| 1 | 0 | 1 | 0 | 1 + 0 = 1 |
| 1 | 1 | 0 | 1 | 1 + 1 = 10 (binary 2 — carry out) |
불 대수식
Sum bit — XOR of inputs.
Carry bit — AND of inputs. Only fires when both bits are 1.
단계별로 시도해 보세요
위 임베드에서 입력을 설정한 후, 예상 결과를 읽고 직접 확인하세요.
- 1A = 0 B = 0예상:
Sum=0, Carry=0관찰 포인트: 0 + 0 = 0. Default state. - 2A = 1 B = 0예상:
Sum=1, Carry=0관찰 포인트: 1 + 0 = 1. Just the sum bit; no overflow. - 3A = 0 B = 1예상:
Sum=1, Carry=0관찰 포인트: Symmetric — XOR is commutative. - 4A = 1 B = 1예상:
Sum=0, Carry=1관찰 포인트: 1 + 1 = 2 (binary 10). Sum bit drops back to 0 because there's no place to put the 2's-bit; the carry signals overflow.
사용된 구성 요소
실제 응용 사례
Bit 0 of any ripple-carry adder. Since there's no carry-in for the lowest bit, a half-adder suffices and saves transistors compared to a full-adder.
Counter increment logic. Incrementing a counter by 1 is equivalent to adding 1 to bit 0 — the half-adder pattern (XOR with the increment input, AND for carry-out) implements this in synchronous counter cells.
Hash/checksum primitive. Some lightweight hash functions XOR adjacent bytes and AND for carry as part of a mixing step.
Educational stepping stone. Half-adders are the bridge between learning logic gates and learning multi-bit arithmetic — every textbook covers them in this order.
Carry-save adder cells. In multiplier circuits, half-adders combine partial-product columns where carry-in isn't needed (the right edge of the array).