8-Bit SIPO Shift Register
8-bit serial-in, parallel-out shift register with dual oscilloscope. Advanced serial-to-parallel data conversion.
배울 내용
- Use an 8-bit SIPO register to assemble a byte from a serial bit stream.
- Recognize the 8-clock latency for full byte reception.
- Connect SIPO registers to SPI, I²C, and other serial protocols.
- Identify 74xx164/595 ICs as commercial 8-bit SIPO implementations.
- Apply SIPO for GPIO expansion and ADC serial output decoding.
작동 원리
An 8-bit SIPO (Serial-In Parallel-Out) shift register is the standard byte-receiving primitive for serial buses. Eight D flip-flops chained: serial data in on one wire, parallel output on 8 wires. After 8 clock cycles, one byte has been fully shifted in and is available simultaneously on Q7..Q0.
The canonical example: an SPI receiver. Each clock edge, the master sends one bit on MOSI; the slave's SIPO register captures it. After 8 clocks, the slave's parallel output holds the received byte, ready for the rest of the slave's logic to use.
The 74xx164 and 74xx595 are classic TTL/CMOS chips that implement exactly this — 8-bit SIPO with optional output latches. They're widely used to expand microcontroller GPIO via 3-wire interfaces.
Key timing: serial input must be stable around each clock edge. The byte is fully assembled and stable on the parallel outputs immediately after the 8th clock edge — usable from cycle 8 onward without waiting.
단계별로 시도해 보세요
위 임베드에서 입력을 설정한 후, 예상 결과를 읽고 직접 확인하세요.
- 1Serial = 00000000 Clock = 8 edges예상:
Q = 00000000관찰 포인트: All-zero stream — register fills with zeros. Parallel output = 0. - 2Serial = 10101010 Clock = 8 edges예상:
Q = 10101010관찰 포인트: Alternating pattern — after 8 clocks the register holds the full alternating byte. Each bit's position depends on shift direction (MSB-first or LSB-first). - 3Serial = 11111111 Clock = 8 edges예상:
Q = 11111111관찰 포인트: All-ones stream — after 8 clocks register is full of 1s. Parallel output = 0xFF. - 4Serial = 01000001 Clock = 8 edges예상:
Q = 01000001 (= 65 = 'A' in ASCII)관찰 포인트: Specific pattern — after 8 clocks the byte 0x41 is on the parallel output. This is how a UART would receive the letter 'A'.
사용된 구성 요소
실제 응용 사례
SPI/I²C byte reception. Each transaction shifts 8 bits in serially; the SIPO register reassembles them as a byte for the receive FIFO.
74xx595 LED driver. A microcontroller controls many LEDs through a 3-wire SPI link to a 595; the 595's SIPO output drives the LEDs in parallel.
ADC serial output decoding. Many ADCs serialize their conversion result; the host shifts the bits into a SIPO and reads the parallel value.
RFID and 1-Wire protocol decoders. Bit-banged serial protocols use SIPO registers to assemble multi-bit fields from the bit stream.
Test scan-out paths. DFT scan chains end at SIPO registers that capture multi-bit signature values for analysis.