Basic Shift Register Demo
Simple shift register demonstration with clock and serial input. Introduction to data shifting and delay line operation.
배울 내용
- Chain flip-flops to form a shift register.
- Distinguish SISO, SIPO, PISO, PIPO shift register configurations.
- See bits propagate one position per clock edge.
- Connect this to UART, SPI, and JTAG serial protocols.
- Apply shift registers as delay lines and pseudo-random generators (LFSRs).
작동 원리
A shift register is a chain of D flip-flops where each flip-flop's output feeds the next one's input. On every clock edge, every bit shifts one position. This makes the register act as a delay line, FIFO, or serial-to-parallel converter, depending on how you wire the I/O.
The basic operation: bit 0 captures the serial input; bit 1 captures bit 0's previous value; bit 2 captures bit 1's; etc. After N clock edges, an N-bit shift register has fully "flushed" the serial input through all positions.
Four common configurations: - SISO (serial-in serial-out): One serial input, one serial output (after N cycles). - SIPO (serial-in parallel-out): Serial input, parallel outputs from each flip-flop. - PISO (parallel-in serial-out): Parallel load, then shift out one bit per clock. - PIPO (parallel-in parallel-out): Just a register, no shift.
Shift registers are the basis of many serial protocols — UART, SPI, JTAG — where data is transmitted bit-by-bit on a single wire and reassembled on the receive side.
단계별로 시도해 보세요
위 임베드에서 입력을 설정한 후, 예상 결과를 읽고 직접 확인하세요.
- 1Serial in = 1 Clock = rising예상:
Bit 0 = 1, others shifted right관찰 포인트: Serial input is captured into bit 0; bit 0's previous value moves to bit 1; etc. Each clock edge shifts the chain by one. - 2Serial in = 0 Clock = after 4 edges예상:
After 4 zeros, register clears관찰 포인트: Sustained 0 input — after N (= width) clock edges the register is fully flushed to all-zeros. - 3Serial in = 1 Clock = after 4 edges예상:
Register fills with 1s: 1111관찰 포인트: Sustained 1 input — register fills bit-by-bit until all positions are 1. - 4Serial in = alternating 1 0 1 0 Clock = running예상:
Pattern propagates through register관찰 포인트: Watch the alternating pattern shift through. After 4 cycles the register holds 1010 (or 0101 depending on phase).
사용된 구성 요소
실제 응용 사례
Serial communication (UART, SPI, JTAG). Transmit-side uses PISO; receive-side uses SIPO. The serial wire carries one bit per clock; the shift register reassembles bytes.
Display drivers. LED matrix and 7-segment chips often use SIPO shift registers to expand a few SPI lines into many output bits.
Pseudo-random generators. LFSRs (linear feedback shift registers) use a shift register with XOR feedback to produce pseudo-random bit sequences.
Pipeline delay lines. A shift register can introduce N cycles of delay to align signals between fast and slow paths.
Serial test patterns. Built-in self-test (BIST) uses shift registers to inject test patterns and capture results sequentially.