
Demultiplexer Tutorial: 1-to-4 and 1-to-8 (DEMUX)
TL;DR: A demultiplexer (DEMUX) is a combinational circuit that takes one data input and routes it to one of output lines, with the destination chosen by an n-bit...
A collection of 9 posts

TL;DR: A demultiplexer (DEMUX) is a combinational circuit that takes one data input and routes it to one of output lines, with the destination chosen by an n-bit...

TL;DR: Equality is a reduction AND of bitwise XNOR results. Unsigned magnitude is decided by the most significant position where A and B differ. Signed magnitude needs a different...

TL;DR: A small ALU is a combinational datapath: candidate arithmetic, logic, and shift functions operate on the same input words, and a multiplexer selects the visible result. The design...

TL;DR: A priority encoder returns the index of the highest-ranked active input and asserts a separate valid signal. A fixed-priority Boolean network resolves simultaneous requests, but it...

TL;DR: A static hazard is a possible pulse on an output that should remain constant during an input transition; a dynamic hazard produces several output transitions where one was...

TL;DR: Canonical Product of Sums ANDs one maxterm for each zero row; canonical Sum of Products ORs one minterm for each one row. Counting zero rows predicts canonical term...

TL;DR: An enabled active-high binary decoder maps an -bit code to one of asserted outputs; active-low variants invert that convention. A plain encoder assumes a one-hot...

TL;DR: A multiplexer selects one of data inputs with an -bit select code. For a 4-to-1 MUX, . Constants on the data inputs turn a MUX into a...

TL;DR: A Karnaugh map arranges a truth table on a Gray-coded grid so adjacent cells differ in one variable. Power-of-two groups identify implicants for a two...