Beyond Sum of Products: Mastering Product of Sums for Efficient Digital Design

While Sum of Products (SOP) is the familiar starting point in digital logic, mastering its dual, Product of Sums (POS), unlocks more efficient circuit designs. This guide breaks down POS, its derivation, and practical simulation on digisim.io.

Denny Denny
6 min read

In the world of digital logic, the Sum of Products (SOP) form is king. It is intuitive, it is usually the first thing taught in Lesson 15 of our curriculum, and it maps directly to the way our brains naturally process "if-this-and-that" conditions. But to rely solely on SOP is like a carpenter using only a hammer when a screwdriver is what the job actually demands.

Its dual, the Product of Sums (POS), is a powerful and often more efficient tool that every serious digital designer must master. If you are building a CPU on digisim.io, or even just trying to pass a mid-term on Boolean algebra, understanding when to pivot from SOP to POS can be the difference between a cluttered, lagging circuit and an elegant, high-performance design.

Understanding POS isn't just an academic exercise; it is a practical necessity for optimization. It unlocks different, sometimes simpler, circuit implementations and provides the flexibility to choose the most efficient path based on the logic function at hand. Let’s dismantle this essential concept and see why it belongs in your design toolkit.

Deconstructing the Product of Sums

At its core, a Product of Sums (POS) expression is exactly what the name implies: a logical product (AND) of one or more sum (OR) terms.

Consider the general form:

$$Y = (A + B) \cdot (\overline{A} + C) \cdot (B + \overline{C})$$

In this expression, each term within the parentheses—like $(A + B)$—is a "sum term." These individual sum terms are then "multiplied" (logically ANDed) together to produce the final output, $Y$.

OR Gate Component

This structure maps naturally to a two-level OR-AND circuit. The first level consists of OR gates that create the sum terms, and their outputs feed into a single AND gate for the final product.

The fundamental building block of a canonical POS expression is the maxterm. A maxterm is a sum term that contains every variable in the function, in either its true or complemented form. While a minterm (SOP) represents a single '1' in a truth table, a maxterm represents a single '0'.

The Maxterm Convention: The Critical "Gotcha"

Here lies the most common point of confusion I see among my students. When transitioning from SOP to POS, your brain has to do a complete 180-degree flip.

In the SOP (minterm) convention:

  • A '1' means the variable is in its true form ($A$).
  • A '0' means the variable is complemented ($\overline{A}$).

In the POS (maxterm) convention, it is the exact opposite:

  • A '0' means the variable is in its true form ($A$).
  • A '1' means the variable is complemented ($\overline{A}$).

Why this inversion? It feels counter-intuitive until you realize the goal. A canonical POS expression is built from the rows where the function’s output is 0. The objective of each maxterm is to produce a '0' for its specific input combination, and only that combination.

Let’s take a 3-variable maxterm, $M_5$, which corresponds to the binary input $101$ ($A=1, B=0, C=1$). For this maxterm to evaluate to $0$, we need to construct a sum where every literal evaluates to $0$ for that specific input.

  • For $A=1$, we must use its complement, $\overline{A}$, which is $0$.
  • For $B=0$, we must use its true form, $B$, which is $0$.
  • For $C=1$, we must use its complement, $\overline{C}$, which is $0$.

The resulting maxterm is $M_5 = \overline{A} + B + \overline{C}$. When the input is $101$, this evaluates to $0 + 0 + 0 = 0$. For any other input combination, at least one of the literals will be $1$, making the entire maxterm $1$. This is the "Aha!" moment: the AND gate at the end of a POS circuit only outputs a $0$ if at least one of its OR-gate inputs drops to $0$.

From Truth Table to POS Expression

The process of deriving a POS expression is systematic. Let’s look at a practical example. Suppose we have a logic function $Y$ defined by the following truth table:

A B C Y Maxterm
0 0 0 1 -
0 0 1 0 $M_1 = A + B + \overline{C}$
0 1 0 1 -
0 1 1 1 -
1 0 0 0 $M_4 = \overline{A} + B + C$
1 0 1 1 -
1 1 0 0 $M_6 = \overline{A} + \overline{B} + C$
1 1 1 1 -

Step 1: Identify the Zeros

Scan the truth table and find all rows where the output $Y$ is $0$. In our table, these are rows 1, 4, and 6.

Step 2: Write the Maxterm for Each Zero

Apply the maxterm convention (0 = true, 1 = complement):

  • Row 1 (001): $A=0, B=0, C=1 \rightarrow (A + B + \overline{C})$
  • Row 4 (100): $A=1, B=0, C=0 \rightarrow (\overline{A} + B + C)$
  • Row 6 (110): $A=1, B=1, C=0 \rightarrow (\overline{A} + \overline{B} + C)$

Step 3: AND the Maxterms

The final POS expression is the logical product: $$Y = (A + B + \overline{C}) \cdot (\overline{A} + B + C) \cdot (\overline{A} + \overline{B} + C)$$

This is often written in compact Pi ($\Pi$) notation: $$Y = \prod M(1, 4, 6)$$

Notice something interesting? The SOP expression for this same function would require five minterms (for the five '1's). By using POS, we only need three terms. In hardware terms, that means fewer gates, less power consumption, and lower propagation delay ($t_{pd}$).

Implementing POS on digisim.io

Theory is fine for a lecture hall, but you really learn this by wiring it up. The OR-AND structure of POS is incredibly satisfying to build on the digisim.io canvas.

AND Gate Component

The Build Guide

  1. Inputs: Place three INPUT_SWITCH components for $A$, $B$, and $C$.
  2. Inversion: Use NOT gates to create the complements $\overline{A}$, $\overline{B}$, and $\overline{C}$.
  3. The OR Level: For our expression $Y = \prod M(1, 4, 6)$, drag three OR gates onto the canvas.
    • Wire the first OR to $A$, $B$, and $\overline{C}$.
    • Wire the second OR to $\overline{A}$, $B$, and $C$.
    • Wire the third OR to $\overline{A}$, $\overline{B}$, and $C$.
  4. The AND Level: Drag one 3-input AND gate onto the canvas.
  5. Final Connection: Connect the outputs of your three OR gates to the inputs of the AND gate. Attach an OUTPUT_LIGHT to the final AND output.

Verification with the Oscilloscope

To truly understand the timing of a POS circuit, I recommend using the OSCILLOSCOPE_8CH. Connect the first three channels to your inputs ($A, B, C$) and the fourth channel to the final output $Y$.

As you toggle the switches, you’ll see the output $Y$ stay HIGH most of the time. It will only "dip" to LOW when you hit the specific binary combinations 001, 100, or 110. This visual confirmation is vital for understanding how POS acts as a "filter" for specific forbidden states.

The "Gotcha": Floating Inputs and Propagation Delay

When building POS circuits, beginners often forget that an AND gate with a floating input might behave unpredictably. In digisim.io, ensure all inputs are tied to a CONSTANT or an INPUT_SWITCH.

Furthermore, consider the propagation delay ($t_{pd}$). In a POS circuit, the signal must pass through an OR gate and then an AND gate. If you are working on a high-speed design, like the ALU_8BIT in Lesson 65, these delays add up.

$$t_{total} = t_{pd(OR)} + t_{pd(AND)}$$

If your SOP version of the same circuit uses fewer levels (e.g., using a NAND-NAND implementation), it might actually be faster even if it uses more gates. This is the kind of trade-off professional engineers weigh every day.

Real-World Applications: Where POS Shines

Why bother with POS when SOP is "easier"? Because in the real world, we often define systems by their failures or exceptions.

1. Memory Address Decoding

In the classic Intel 8086 architecture, or even modern microcontrollers, address decoders are used to enable specific chips. Often, a chip should be active for almost the entire address range, except for a few specific "holes" reserved for I/O or system ROM.

Instead of writing a massive SOP expression for every valid address, designers use POS to define the "forbidden" addresses. If the address matches a forbidden range (a maxterm), the output drops to $0$, disabling the chip. It’s cleaner, faster, and uses significantly less silicon.

2. Industrial Safety Interlocks

Imagine a high-pressure steam boiler. You want the system to remain active (Output=1) unless a dangerous condition occurs.

  • Condition 1: Pressure > Threshold
  • Condition 2: Temperature > Threshold
  • Condition 3: Manual Emergency Stop Pressed

The logic is: "Keep running UNLESS (High Pressure) OR (High Temp) OR (E-Stop)." This is a single maxterm. The POS form allows you to add more "shutdown" conditions simply by adding more OR gates to the final AND gate. It is inherently more scalable for safety-critical logic.

Challenge: The NOR-NOR Transformation

Before you go, here is a challenge. Using De Morgan's laws, any OR-AND circuit can be converted into a NOR-NOR circuit. Why does this matter? Because in many CMOS manufacturing processes, NOR gates are smaller and faster than OR or AND gates.

Can you take the POS circuit you built today and replace every gate with a NOR gate? (Hint: You'll need to think about the inversions at the inputs).

Conclusion

The Product of Sums is more than just a different way to write a truth table; it is a mindset. It teaches you to look at the "zeros" of a problem—the exceptions, the errors, and the shutdowns. By mastering POS, you gain the ability to choose the most efficient implementation for your hardware, saving gates, space, and time.

Ready to put this into practice? Don't just take my word for it. Open the simulator, grab an AND gate and a few OR gates, and start building.