A collection of 4 posts
TL;DR: A counter follows a defined state sequence; a finite-state machine (FSM) adds input-dependent transitions and outputs. Ripple-counter bits settle at different times. Synchronous counters and...
TL;DR: On its active clock edge, a JK flip-flop holds for JK=00, resets for 01, sets for 10, and toggles for 11. Its next-state equation is...
TL;DR: An -stage Johnson counter is a shift register whose inverted last output feeds the first input. From a valid initial state it traverses states: ones fill the register...
TL;DR: A T flip-flop toggles its stored bit on every active clock edge when T=1 and holds it when T=0. Its characteristic equation is . Tied permanently...
