Gray Code Explained: Why Rotary Encoders Use It

TL;DR: Gray code is a binary numeral system where successive values differ by exactly one bit. Rotary encoders, FIFO pointers, and Karnaugh maps use it because single-bit transitions eliminate the transient invalid states that plague straight binary counters during simultaneous bit flips.

A standard 4-bit binary counter advancing from $0111$ to $1000$ flips all four bits at once. In an idealized timing diagram those bits change simultaneously. In real silicon — with mismatched gate delays, slewing edges, and noisy supply rails — they change in some unspecified order, producing a brief flicker of intermediate values like $1111$ or $0000$ on the bus. For a CPU register that’s harmless: the value is sampled by a clock edge after everything settles. For a sensor read by an asynchronous observer, those glitches are real readings.

Gray code, also called reflected binary code, eliminates the problem at its root: any two adjacent values in the sequence differ in exactly one bit. There is no simultaneous flip to glitch through.

Why Does Single-Bit Adjacency Matter?

Consider a rotary encoder — the optical or magnetic disc that tells a motor controller what angle a shaft is at. The disc has concentric tracks, each track contributing one bit of the position word, read by a sensor at a fixed angle. As the disc rotates, the sensor sees a sequence of binary values.

If the tracks are encoded in straight binary, the boundary between position $3$ ($011$) and position $4$ ($100$) requires three tracks to change state at the same physical angle. Manufacturing tolerances guarantee the sensors don’t actually see all three transitions at the same instant. For a few microradians the controller might read $111$ (position 7), $000$ (position 0), or any other intermediate. A motor servo loop reading garbage at the boundary will twitch, oscillate, or — in safety-critical applications — fail.

Encoding the same disc in Gray code makes every angular boundary a single-bit transition:

Look at the Gray column. Between any two adjacent rows exactly one bit flips. Between row 7 and row 0 (wrapping around), exactly one bit flips. The sequence is cyclic and unit-distance. There is no boundary where mismatched sensor timing can produce a wrong reading — at worst the sensor reports the old value or the new value, never something else.

The 4-Bit Gray Code Table

The pattern extends naturally:

The “reflected” name comes from the construction rule: to build the $(n+1)$-bit code, take the $n$-bit code, mirror it vertically, prepend a $0$ to the original half and a $1$ to the mirrored half. Mirroring guarantees the boundary between halves is a single-bit transition (the new MSB).

Binary-to-Gray Conversion

The conversion from binary $b$ to Gray $g$ is one of the cleanest formulas in digital logic:

$g_i = b_i \oplus b_{i+1}$

with $b_n = 0$ for the MSB. As a single expression:

$g = b \oplus (b \gg 1)$

In hardware that’s literally a chain of XOR gates — one per bit, with no carry chain. The conversion is purely combinational and finishes in a single gate delay regardless of word width. To see why XOR is the right operator, revisit the XOR gate’s role as a difference detector: it returns 1 exactly when adjacent bits disagree, and disagreement between adjacent binary positions is precisely what marks a Gray-code transition.

Worked example. Convert binary $1011$ to Gray.

• $g_3 = b_3 \oplus 0 = 1$
• $g_2 = b_2 \oplus b_3 = 0 \oplus 1 = 1$
• $g_1 = b_1 \oplus b_2 = 1 \oplus 0 = 1$
• $g_0 = b_0 \oplus b_1 = 1 \oplus 1 = 0$

Result: Gray $1110$, which the table above confirms is the encoding of decimal 11.

Gray-to-Binary Conversion

The inverse direction is slightly less elegant — it has a dependency chain:

$b_i = g_i \oplus g_{i+1} \oplus g_{i+2} \oplus \dots \oplus g_n$

Equivalently, walking from the MSB down: $b_n = g_n$, then $b_{i} = b_{i+1} \oplus g_i$. Each binary bit is the running XOR of all Gray bits at or above its position. This does form a propagation chain — the gray-to-binary converter for an $n$-bit word has $n$ XOR delays in series, the same critical-path shape as a ripple-carry adder.

For the example above, decoding Gray $1110$:

• $b_3 = g_3 = 1$
• $b_2 = b_3 \oplus g_2 = 1 \oplus 1 = 0$
• $b_1 = b_2 \oplus g_1 = 0 \oplus 1 = 1$
• $b_0 = b_1 \oplus g_0 = 1 \oplus 0 = 1$

Recovered binary: $1011$, decimal 11. Round-trip clean.

Beyond Encoders: Clock Domain Crossing

Rotary encoders are the textbook motivation, but the most consequential modern use of Gray code lives inside FPGAs and SoCs: asynchronous FIFO pointers for clock-domain crossing (CDC).

A FIFO that bridges two clock domains needs the read-side logic to know how much data the write-side has produced, and vice versa. That means each side must sample the other side’s pointer. Sampling a multi-bit binary counter that just incremented across a multi-bit boundary risks reading a value that never existed — exactly the rotary-encoder problem in a different costume.

Encoding the pointers in Gray code guarantees that no matter when the receiving flip-flops sample, they see either the old pointer or the new pointer, never garbage. Combined with a two-flop synchronizer to handle setup, hold, and metastability, Gray-coded pointers are the canonical CDC technique. Every commercial async FIFO IP block uses them.

A Gray-Code Counter in Hardware

You can’t simply replace a binary counter’s flip-flops to get a Gray counter — the next-state logic has to encode the unit-distance transition rule directly. Two practical approaches:

1. Binary counter + binary-to-Gray converter. Run a normal binary COUNTER and feed its output through the $b \oplus (b \gg 1)$ XOR network. The COUNTER itself can glitch internally, but the Gray output transitions cleanly because the XOR mask absorbs the multi-bit flips. This is the dominant implementation when only the output needs to be glitch-free.
2. Native Gray counter. A state-machine flip-flop bank with explicit next-state logic for each Gray transition. More complex to derive but avoids the binary intermediate. Useful when the counter itself needs to be sampled mid-flight.

To experiment with the first approach, open the 4-bit binary counter template, tap the four output bits, and add three XOR gates implementing $g_i = b_i \oplus b_{i+1}$. Probe both buses on the simulator’s logic analyzer — the binary bus shows multi-bit transitions per clock; the Gray bus shows exactly one bit changing per tick.

Drawbacks: The Math Is Awkward

Gray code’s superpower — single-bit transitions — comes with a price: arithmetic in Gray code is painful. There is no carry-propagation formula that works directly on Gray-coded values. Adding two Gray numbers requires converting both to binary, adding, and converting back. Multiplication and shifting are similarly broken.

That’s why no general-purpose ALU operates in Gray code. The encoding is a transport format: clean transitions on the wire, decoded back to binary at the destination for any actual computation. Karnaugh maps inherit the same property — adjacent cells differ by one bit specifically so that grouping minterms into prime implicants works geometrically — but the simplification yields a Boolean expression in standard form, not a Gray-coded one.

Historical Note

The encoding is named after Frank Gray, a Bell Labs engineer who patented its use in pulse-code modulation in 1953. The underlying mathematics — a Hamiltonian path through the corners of an $n$-dimensional hypercube where each step traverses one edge — appeared in earlier work by figures like Émile Baudot (1870s telegraph codes) and Louis Gros (1872, Théorie du Baguenodier, on the Chinese rings puzzle), as well as in much older studies of binary representations across cultures. Gray’s contribution was the rigorous application to error-resistant signaling; the name stuck.

Common Pitfalls

• Assuming arithmetic works. Adding Gray-coded values bit-wise produces nonsense. Always convert to binary first.
• Ignoring the MSB-zero convention. The binary-to-Gray formula assumes a virtual zero above the MSB. Forgetting this flips the sign of the high bit.
• Mixing Gray with shift-register loops. A standard shift register, like the SISO/SIPO designs, shifts bits laterally and doesn’t preserve unit-distance properties end-to-end. Convert at the boundaries.
• Confusing Gray with one-hot. One-hot encoding (only one bit ever set) is also glitch-resistant in a different sense, but it’s $O(2^n)$ wide instead of $n$. Gray code is the compact choice.

What’s Next

The next post in this series, SISO, SIPO, PISO, PIPO: Shift-Register Modes Compared, walks through the four shift-register configurations that move bits between serial and parallel forms — including how Gray-coded synchronizers fit into the larger CDC picture.

To see Gray code in action right now, load the 4-bit binary counter template, wire its outputs through three XOR gates as described above, and watch the difference on a logic analyzer. The single-bit-transition property isn’t a textbook abstraction — it’s visible on the trace within the first few clock cycles.