XOR Gate: Truth Table, Boolean Expression and Examples

TL;DR: The XOR (Exclusive OR) gate outputs 1 only when its inputs differ. Boolean expression $Y = A \oplus B = \overline{A} \cdot B + A \cdot \overline{B}$. XOR is binary addition modulo 2, the sum bit of a half adder, the basis of parity reduction, a controllable inverter for arithmetic circuits, and an operation used in many cryptographic constructions.

Test the XOR gate in Digital Logic Lab: toggle both inputs through 00, 01, 10 and 11, then compare the output with the truth table below. For the component’s controls, read the XOR gate reference.

The XOR gate detects two-input inequality: it outputs HIGH only when its inputs disagree. XOR also represents addition modulo 2, which is why it appears within parity equations and many arithmetic and cryptographic constructions. Those systems require additional logic and constraints; XOR alone is not an adder, an error-correcting code, or a cipher.

What is an XOR Gate? The Logic of Difference

At its core, an XOR gate is a digital logic gate that produces a HIGH output (1) only when its inputs are dissimilar. If the inputs are the same—both HIGH or both LOW—the output is LOW (0). This “exclusive” nature is what distinguishes it from a standard OR gate, which would output HIGH if one or both inputs were HIGH.

Think of it as a strict “one or the other, but not both” rule. For two inputs, this is exactly the Boolean inequality function.

Try XOR Gate Behavior Now

Technical Specification: The Truth Table

The behavior of a 2-input XOR gate is specified by its truth table. Let’s denote the inputs as $A$ and $B$, and the output as $Y$.

The pattern is unmistakable: the output $Y$ is 1 if and only if the inputs are not equal. This makes a 2-input XOR a direct difference detector.

The Boolean Expression

In Boolean algebra, the XOR operation is represented by the symbol $\oplus$. The equation for the output $Y$ is:

This is the shorthand we use in high-level design. However, to understand how to build an XOR gate from more basic components like AND, OR, and NOT, we can expand this expression into its Sum-of-Products (SOP) form. This form directly translates from the truth table rows where the output is 1:

This equation reads: “The output is HIGH if (NOT A is HIGH AND B is HIGH) OR (A is HIGH AND NOT B is HIGH).” If you were to build this using discrete gates on digisim.io, you’d need two NOT gates, two AND gates, and one OR gate. The XOR symbol expresses this function as one logical block; physical implementation cost depends on the target library or device technology.

Common Pitfall: The Multi-Input Misconception

The 2-input XOR is a “difference detector.” When a third input $C$ is added, it is tempting — and wrong — to assume the gate outputs 1 only when exactly one of the three inputs is 1.

For three or more inputs, the standard associative XOR reduction has a different interpretation.

A multi-input XOR gate functions as an odd-parity detector. It outputs 1 if there is an odd number of HIGH inputs. Let’s look at the 3-input truth table to see why:

Why does this happen? It’s due to the associative property of XOR: $A \oplus B \oplus C = (A \oplus B) \oplus C$. The circuit essentially cascades the XOR logic. The first gate checks if A and B are different. The second gate then checks if that result is different from C.

This behavior supports parity checks. If a single received bit changes, an XOR reduction changes polarity and the parity check fails. More generally, simple parity detects every odd number of bit changes but misses every even number, so passing parity is not proof that the data is correct.

Hands-On: The Controllable Inverter

One practical use of XOR is a controllable inverter. A conventional adder/subtractor can XOR each bit of one operand with a subtract control and apply that same control as carry-in, thereby forming the two’s complement used for subtraction. This is a common teaching and implementation pattern, not a requirement that every ALU contain visible XOR gates.

Imagine you have two inputs: Data and Control.

1. If Control is 0: $Data \oplus 0 = Data$. The signal passes through unchanged.
2. If Control is 1: $Data \oplus 1 = \bar{Data}$. The signal is inverted.

Toggling the control changes the same XOR cell between pass-through and inversion. A conventional adder/subtractor uses this relationship together with carry-in; other ALU implementations may realize subtraction differently.

Building it on digisim.io

1. Open the digisim.io editor.
2. Place an XOR gate in the center.
3. Connect two INPUT_SWITCH components to the inputs. Label one “Data” and the other “Control” using the TEXT tool.
4. Connect an OUTPUT_LIGHT to the output.
5. Toggle the “Control” switch and watch how the “Data” switch’s influence on the light changes.

To see this in a more complex context, check out the XOR Difference Detector template:

Open XOR Difference Detector

Verifying Behavior with the OSCILLOSCOPE

When you’re working with high-speed circuits, the “instant” change of a gate is an illusion. Every gate has a propagation delay ($t_{pd}$). In digisim.io, you can visualize this timing using the OSCILLOSCOPE.

Connect the inputs and output to an OSCILLOSCOPE_8CH to inspect transitions represented by DigiSim’s event model. A waveform can reveal a modeled hazard only when the network, input transition, delay semantics, and display resolution produce one. It cannot prove a physical implementation glitch-free or reproduce analog pulse amplitude, noise, or process-voltage-temperature variation. Use static timing and the target technology’s characterization for hardware sign-off.

Application 1: Binary arithmetic

In the standard half-adder decomposition, XOR supplies Sum and AND supplies Carry. When you add two binary digits, the “Sum” is calculated using XOR, while the “Carry” is calculated using an AND gate.

Consider $1 + 1$ in binary.

• The Sum ($1 \oplus 1$) is 0.
• The Carry ($1 \cdot 1$) is 1.
• Result: $10_2$ (which is 2 in decimal).

The XOR function is a concise way to express a sum bit. Equivalent arithmetic can be synthesized from NAND, NOR, compound cells, or programmable logic, so a software workload does not imply a count of standalone XOR operations in a particular processor.

Explore the Half-Adder Template

Application 2: Cryptographic constructions

XOR is widely used in symmetric cryptography because it is inexpensive and self-inverse.

If you have a message ($M$) and a secret key ($K$), you can create a ciphertext ($C$) by XORing them together:

To get the original message back, you simply XOR the ciphertext with the same key:

This algebra underlies the one-time pad, which provides perfect secrecy only when the key is uniformly random, at least as long as the message, kept secret, and never reused. AES also uses XOR for the AddRoundKey transformation, but its security comes from the complete standardized construction, key size, implementation, and mode of use—not from XOR alone.

Common Mistakes to Avoid

When building XOR circuits on digisim.io, keep these “Pro Tips” in mind:

1. Floating Inputs: Never leave an XOR input unconnected. In a real circuit, a floating input can pick up electrical noise and cause the gate to oscillate. In digisim.io, use a CONSTANT_ZERO if you need to tie an unused input to a known state.
2. Logic Levels: Remember that XOR is a logic gate, not a power switch. It can signal a difference, but it shouldn’t be used to drive high-current components directly without a BUFFER or a transistor model.
3. The OR confusion: For two inputs, OR and XOR differ only at 11. Use XOR for bitwise inequality; use an OR reduction to report whether any per-bit mismatch is present in a word.

Master the Logic of Difference

The 2-input inequality rule extends to associative modulo-2 reduction. That operation is useful in arithmetic, parity checks, and cryptographic designs when combined with the rest of each construction. The next post in this series, The XNOR Gate, is the equality-detector counterpart, and XOR vs. XNOR: The Critical Difference in Error Detection compares them head-to-head.

Open the XOR component reference to verify the truth table, then build the controllable inverter from this post directly in the simulator.

Related Lessons for Further Study

• The XNOR Gate — the complement gate.
• The Half Adder and Half Adder vs. Full Adder — XOR as the sum bit.
• Visualizing Logic: Karnaugh Maps — recognizing parity and equality patterns during simplification.

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NAND truth table · XNOR truth table · Digital logic simulator and learning paths

See an earlier approach to enciphering in the three-rotor cipher machine exhibit, modeled on the Enigma.