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Pro Learning Collection

Progress from core concepts to advanced digital-system design.

Follow the complete guided curriculum from logic gates to processor architecture.

69 lessons
1576 steps
7 languages

69 Lessons in This Set

Lessons are ordered by cognitive flow — each builds on the previous one.
01

Lesson 01: Introduction to Digital Signals

33 steps
02

Lesson 75: Logic Levels and Thresholds

18 steps
03

Lesson 02: Binary Number System

34 steps
04

Lesson 03: Two's Complement

31 steps
05

Lesson 05: The AND Gate

32 steps
06

Lesson 06: The OR Gate

30 steps
07

Lesson 07: Building Simple Circuits

25 steps
08

Lesson 09: The Buffer Gate

20 steps
09

Lesson 10: The NAND Gate

27 steps
10

Lesson 11: The NOR Gate

25 steps
11

Lesson 12: The XOR Gate

27 steps
12

Lesson 13: The XNOR Gate

26 steps
13

Lesson 14: De Morgan's Law I

27 steps
14

Lesson 15: Universal NOT Gate

17 steps
15

Lesson 16: Universal AND Gate

24 steps
16

Lesson 17: Universal OR Gate

23 steps
17

Lesson 18: Boolean Simplification I

30 steps
18

Lesson 19: Boolean Simplification II

21 steps
19

Lesson 20: Product of Sums (POS)

23 steps
20

Lesson 79: Sum of Products (SOP)

20 steps
21

Lesson 21: Don't Care Conditions

26 steps
22

Lesson 22: Propagation Delay

31 steps
23

Lesson 23: Half Adder

27 steps
24

Lesson 24: Full Adder

26 steps
25

Lesson 25: 4-Bit Ripple Carry Adder

31 steps
26

Lesson 26: Half Subtractor

20 steps
27

Lesson 28: Overflow Detection

29 steps
28

Lesson 29: 2-Bit Binary Multiplier

22 steps
29

Lesson 30: 1-Bit Magnitude Comparator

21 steps
30

Lesson 31: 4-Bit Magnitude Comparator

24 steps
31

Lesson 32: 2-to-1 Multiplexer

23 steps
32

Lesson 33: 4-to-1 Multiplexer

24 steps
33

Lesson 34: 8-to-1 Multiplexer

22 steps
34

Lesson 35: 1-to-4 Demultiplexer

23 steps
35

Lesson 36: 2-to-4 Decoder

23 steps
36

Lesson 37: 3-to-8 Decoder

20 steps
37

Lesson 38: Priority Encoder

22 steps
38

Lesson 39: Binary to Gray Code Converter

27 steps
39

Lesson 40: Gray Code to Binary Converter

21 steps
40

Lesson 41: 4-Bit Parity Checker

26 steps
41

Lesson 42: 4-Bit Parity Generator

20 steps
42

Lesson 78: Parity Generators and Checkers

16 steps
43

Lesson 76: NAND Logic Implementation

17 steps
44

Lesson 77: NOR Logic Implementation

16 steps
45

Lesson 72: Circuit Optimization I

17 steps
46

Lesson 73: Circuit Optimization II

18 steps
47

Lesson 44: SR Latch (NOR-Based)

31 steps
48

Lesson 45: SR Latch (NAND-Based)

24 steps
49

Lesson 47: Gated SR Latch

27 steps
50

Lesson 48: The Clock Signal

28 steps
51

Lesson 50: D Flip-Flop

33 steps
52

Lesson 51: JK Flip-Flop

29 steps
53

Lesson 52: T Flip-Flop

16 steps
54

Lesson 54: Master-Slave Flip-Flop

31 steps
55

Lesson 55: Introduction to Registers

18 steps
56

Lesson 56: Shift Register (SIPO)

19 steps
57

Lesson 57: Shift Register (PISO)

17 steps
58

Lesson 59: Asynchronous Counter

14 steps
59

Lesson 60: Synchronous Counter

12 steps
60

Lesson 63: Ring Counter

15 steps
61

Lesson 64: Johnson Counter

15 steps
62

Lesson 65: Counter Applications

12 steps
63

Lesson 68: Sequence Detector

18 steps
64

Lesson 69: Traffic Light Controller

17 steps
65

Lesson 66: RAM Cell (SRAM)

21 steps
66

Lesson 67: Memory Organization

16 steps
67

Lesson 70: Program Counter

17 steps
68

Lesson 71: Control Unit Basics

17 steps
69

Lesson 74: Level 2 Review: 4-Bit Calculator

24 steps

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