The Half Adder: Your First Step into Digital Logic Design

In the grand architecture of computation, every complex operation—from rendering a high-fidelity video game world to calculating a spacecraft's trajectory—can be distilled into a cascade of simple, binary decisions. At the absolute foundation of all digital arithmetic lies an elegant and deceptively simple circuit: the HALF_ADDER. It is the first step any aspiring engineer takes in teaching a machine how to count. It is the primordial atom from which all complex arithmetic is born.

If you've ever wondered how a slab of silicon "knows" that one plus one equals two (or rather, $10_2$), you're looking for the HALF_ADDER. Let's dissect this fundamental component, understand the logic that drives it, and build it from the ground up using digisim.io.

Defining the HALF_ADDER

A HALF_ADDER is a combinational logic circuit designed to perform the addition of two single binary digits. In the hierarchy of digital systems, it sits just above basic logic gates but below the more complex FULL_ADDER and ALU (Arithmetic Logic Unit). It's the digital equivalent of adding two numbers in the rightmost column when you do long addition on paper.

The circuit takes two inputs, typically labeled $A$ and $B$, and produces two distinct outputs:

1. Sum ($S$): The result of the addition in the current bit position.
2. Carry ($C$): The "carry-the-one" bit that is passed to the next, more significant column in a multi-bit addition.

To understand why we need two outputs, we only need to look at the four fundamental rules of binary addition:

• $0 + 0 = 0$ (Sum = 0, Carry = 0)
• $0 + 1 = 1$ (Sum = 1, Carry = 0)
• $1 + 0 = 1$ (Sum = 1, Carry = 0)
• $1 + 1 = 10_2$ (Sum = 0, Carry = 1)

The HALF_ADDER's entire existence is dedicated to implementing these four rules in hardware. It's the simplest possible way to handle the "overflow" that occurs when two high signals meet.

The Truth Table: Revealing the Logic

In digital design, we don't guess; we map. To translate mathematical rules into a physical circuit, we use a truth table. This table exhaustively lists every possible input combination and the required output.

Look closely at those output columns. If you've spent any time in Lesson 5 through Lesson 12 of our curriculum, these patterns should jump off the screen at you.

The Sum (S) column is only HIGH when the inputs are different. If both are LOW or both are HIGH, the Sum is LOW. This is the exact definition of an XOR gate.

The Carry (C) column is only HIGH when both inputs are HIGH. This is the unmistakable signature of an AND gate.

The Boolean Expression

With the gate identities revealed, we can formalize the HALF_ADDER using Boolean algebra. These equations are the "source code" of the hardware world.

For the Sum output, we use the XOR operator, denoted by $\oplus$: $$S = A \oplus B$$

For the Carry output, we use the AND operator, represented by a dot ($\cdot$): $$C = A \cdot B$$

This is the "Aha!" moment for many students. We've taken a mathematical concept (addition) and realized it can be entirely constructed using just two elementary logic gates: one XOR and one AND. No magic, just logic.

The "Gotcha": Why is it only "Half" an Adder?

I often see students get frustrated when they try to chain four HALF_ADDER components together to make a 4-bit adder. They quickly realize it doesn't work. Why? Because the HALF_ADDER has a fatal flaw: it has no input for a carry-in bit.

Think back to primary school math. If you're adding $18 + 24$, you start at the right: $8 + 4 = 12$. You write down the $2$ and carry the $1$. Now, look at the next column. You aren't just adding $1 + 2$; you're adding $1 + 2 + (\text{the carried } 1)$.

That second column requires three inputs. A HALF_ADDER only has two ($A$ and $B$). It can handle the very first column of an addition (the Least Significant Bit), but it's useless for any subsequent columns because it can't "listen" to the carry bit coming from the previous stage.

To build a real-world multi-bit adder, you need a FULL_ADDER, which adds a third input ($C_{in}$). We call this the "Half" adder because it only does half the job required for multi-bit arithmetic.

Building the Circuit on digisim.io

Let's move from theory to implementation. Building a HALF_ADDER from discrete gates is a rite of passage. Follow these steps in the digisim.io editor:

1. Place Inputs: Drag two INPUT_SWITCH components onto the canvas. Label them A and B.
2. Place Logic: Add one XOR gate and one AND gate.
3. Place Outputs: Add two OUTPUT_LIGHT components. Label them Sum and Carry.
4. Wiring:
   • Connect Input A to the first input of the XOR and the first input of the AND.
   • Connect Input B to the second input of the XOR and the second input of the AND.
   • Connect the XOR output to the Sum light.
   • Connect the AND output to the Carry light.

Visualizing with SimCast

When you toggle the switches, you'll see the signals propagate. In a SimCast animation, you can actually observe the slight delay as the signal travels through the XOR gate versus the AND gate. While they appear instantaneous to the human eye, in high-speed computing, these nanoseconds matter.

Verification with the OSCILLOSCOPE

To truly understand the behavior of your circuit, especially as you move toward Lesson 25 and beyond, you need to look at the timing.

Place an OSCILLOSCOPE_8CH into your circuit. Connect Channel 1 to Input A, Channel 2 to Input B, Channel 3 to Sum, and Channel 4 to Carry.

As you toggle the switches, the OSCILLOSCOPE will show you the logic levels over time. You'll notice that the Carry only spikes when both input channels are at $5V$ (Logic 1). This real-time waveform analysis is how professional engineers debug "glitches"—brief, unwanted transitions in the output that occur because different gates have different propagation delays ($t_{pd}$).

In a HALF_ADDER, the XOR gate is typically more complex and slightly slower than the AND gate. On the OSCILLOSCOPE, you might see the Sum bit change a fraction of a microsecond after the Carry bit when transitioning from $01$ to $11$.

Real-World Applications

The HALF_ADDER isn't just a classroom example; it's a workhorse in industry.

1. The LSB of the ALU

In every Arithmetic Logic Unit (ALU), from the classic MOS 6502 to the latest Apple M3 chip, multi-bit addition starts with a HALF_ADDER. Because the Least Significant Bit (LSB) has no bit to its right, there is never a carry-in to worry about. Using a HALF_ADDER here instead of a FULL_ADDER saves transistors, reduces heat, and increases speed.

2. Address Generation Units (AGUs)

Processors spend a lot of time calculating memory addresses. Often, this involves simply incrementing a value (adding 1). A simple incrementer can be built by feeding a signal into a chain of adders. The very first stage of that incrementer is almost always a HALF_ADDER.

Moving Forward in the Curriculum

The HALF_ADDER is your gateway to Lesson 22 (Arithmetic Circuits). Once you've mastered this, you're ready for the following:

• Lesson 23: The FULL_ADDER: Learning how to handle that pesky carry-in bit.
• Lesson 24: Ripple Carry Adders: Stringing multiple adders together to add 4-bit, 8-bit, or 16-bit numbers.
• Lesson 26: The ALU_8BIT: Seeing how these small addition circuits combine with logic operations to form the heart of a CPU.

Final Thoughts

The HALF_ADDER is a masterclass in efficiency. It takes the messy, human concept of "addition" and reduces it to two elegant logic gates. By building and simulating this circuit on digisim.io, you aren't just clicking icons; you're retracing the steps of the pioneers who built the first digital computers.

Don't just take my word for it. Open the simulator, wire up an XOR and an AND gate, and watch the binary logic come to life.