SR vs. JK Flip-Flops: The Basics of Sequential Logic
Digital Logic 101
📅 January 2026 • ⏱️ 20 min read • 🎓 Intermediate
So far, we've explored combinational logic—circuits where the output depends only on current inputs. But how do computers remember things? Enter sequential logic: circuits that have memory. In this tutorial, you'll master two fundamental flip-flops that form the basis of all digital memory.
Combinational vs. Sequential Logic
Combinational circuits (like adders and multiplexers) produce outputs based solely on their current inputs. Change the inputs, and the outputs change immediately.
Sequential circuits have an additional property: state. Their outputs depend not only on current inputs but also on the history of inputs—they have memory. This is what allows computers to store data.
Key Insight: What is "State"?
State is the circuit's "memory" of past events. A flip-flop can be in state Q=0 or Q=1, and it maintains that state until explicitly told to change. This is fundamentally different from a combinational circuit, which has no concept of "before."
The SR Latch: Simplest Memory
The SR latch (Set-Reset latch) is the simplest memory element. It has two inputs: S (Set) and R (Reset), and two outputs: Q and QĚ„ (Q-bar, the complement of Q).
SR Latch: Set and Reset
S = 1: Sets Q to 1 (stores a 1)
R = 1: Resets Q to 0 (stores a 0)
S = R = 0: Hold—maintains current state (memory!)
S = R = 1: Invalid—undefined behavior!
An SR latch built from two cross-coupled NOR gates. The feedback creates bistable behavior—it "remembers" its state.
Interactive SR Latch demonstration showing all four operation modes.
Warning: The Invalid State
When S=R=1, the SR latch enters an unstable condition. Both outputs try to be 0, violating the rule that Q and Q̄ should be complements. When both inputs return to 0, the final state is unpredictable—this is a race condition!
The JK Flip-Flop: The Complete Solution
The JK flip-flop solves the SR latch's "invalid state" problem and adds a powerful new feature: toggle mode. It's named after its inventor, Jack Kilby (one origin story), and is perhaps the most versatile flip-flop.
JK Flip-Flop: Four Modes of Operation
J=0, K=0: Hold—no change (like SR)
J=0, K=1: Reset—Q becomes 0 (like SR)
J=1, K=0: Set—Q becomes 1 (like SR)
J=1, K=1: Toggle—Q flips to opposite state! (the key innovation)
A JK flip-flop with oscilloscope showing the relationship between clock, inputs, and outputs.
The JK flip-flop lesson showing all modes of operation with detailed truth table and timing diagram.
Key Insight: Why Toggle Mode Matters
Toggle mode (J=K=1) makes the JK flip-flop perfect for building counters. On each clock pulse, the output flips from 0→1 or 1→0. Chain four together, and you have a 4-bit binary counter!
Edge Triggering: The Clock's Role
Modern flip-flops are edge-triggered—they only change state at the precise moment of a clock edge (rising or falling). This prevents timing issues and ensures predictable behavior.
A D flip-flop showing edge-triggered behavior. The output only changes at the clock's rising edge, not while inputs change.
SR Latch vs. JK Flip-Flop Comparison
| Feature | SR Latch | JK Flip-Flop |
|---|---|---|
| Inputs | Set (S), Reset (R) | J, K, Clock |
| S=R=1 / J=K=1 | Invalid (race condition) | Toggle (well-defined) |
| Triggering | Level-sensitive (asynchronous) | Edge-triggered (synchronous) |
| Clock Required? | No (basic latch) | Yes |
| Use Case | Switch debouncing, simple storage | Counters, registers, FSMs |
The D Flip-Flop: Simplicity
The D flip-flop (Data flip-flop) is another important variant. It has just one data input: whatever value is on D gets captured to Q on the clock edge. It's the workhorse of registers and synchronous systems.
D flip-flop: the simplest way to store one bit. D input is captured to Q on each clock edge.
Building Counters with Flip-Flops
One of the most common applications of JK (or T) flip-flops is building counters. When J=K=1, each clock pulse toggles the output—perfect for binary counting!
T flip-flops configured as a frequency divider. Each stage halves the frequency, visible on the oscilloscope.
A 4-bit asynchronous counter using T flip-flops. Watch the count ripple through stages!
Applications of Flip-Flops
- Registers: Groups of D flip-flops storing multi-bit values
- Counters: Binary, decade, and modulo-N counters
- Shift Registers: Serial-to-parallel and parallel-to-serial conversion
- State Machines: Controlling sequences of operations
- Frequency Division: Creating slower clocks from faster ones
- Debouncing: Cleaning up noisy switch signals
Try It Yourself!
Experiment with flip-flops in DigiSim.io:
- SR Latch: Build from two NOR gates, test all four input combinations.
- JK Flip-Flop: Wire J=K=1 and observe toggle mode with a clock.
- 2-Bit Counter: Chain two JK flip-flops to count 0-3.
- D Flip-Flop: Use one to "sample" a rapidly changing signal.
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